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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2 3%YAML 1.24---5$id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Qualcomm CAMSS ISP9 10maintainers:11 - Robert Foss <robert.foss@linaro.org>12 - Todor Tomov <todor.too@gmail.com>13 14description: |15 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms16 17properties:18 compatible:19 const: qcom,msm8916-camss20 21 clocks:22 minItems: 1923 maxItems: 1924 25 clock-names:26 items:27 - const: top_ahb28 - const: ispif_ahb29 - const: csiphy0_timer30 - const: csiphy1_timer31 - const: csi0_ahb32 - const: csi033 - const: csi0_phy34 - const: csi0_pix35 - const: csi0_rdi36 - const: csi1_ahb37 - const: csi138 - const: csi1_phy39 - const: csi1_pix40 - const: csi1_rdi41 - const: ahb42 - const: vfe043 - const: csi_vfe044 - const: vfe_ahb45 - const: vfe_axi46 47 interrupts:48 minItems: 649 maxItems: 650 51 interrupt-names:52 items:53 - const: csiphy054 - const: csiphy155 - const: csid056 - const: csid157 - const: ispif58 - const: vfe059 60 iommus:61 maxItems: 162 63 power-domains:64 items:65 - description: VFE GDSC - Video Front End, Global Distributed Switch Controller.66 67 ports:68 $ref: /schemas/graph.yaml#/properties/ports69 70 description:71 CSI input ports.72 73 properties:74 port@0:75 $ref: /schemas/graph.yaml#/$defs/port-base76 unevaluatedProperties: false77 description:78 Input port for receiving CSI data.79 80 properties:81 endpoint:82 $ref: video-interfaces.yaml#83 unevaluatedProperties: false84 85 properties:86 data-lanes:87 description:88 An array of physical data lanes indexes.89 Position of an entry determines the logical90 lane number, while the value of an entry91 indicates physical lane index. Lane swapping92 is supported. Physical lane indexes;93 0, 2, 3, 4.94 minItems: 195 maxItems: 496 97 required:98 - data-lanes99 100 port@1:101 $ref: /schemas/graph.yaml#/$defs/port-base102 unevaluatedProperties: false103 description:104 Input port for receiving CSI data.105 106 properties:107 endpoint:108 $ref: video-interfaces.yaml#109 unevaluatedProperties: false110 111 properties:112 data-lanes:113 minItems: 1114 maxItems: 4115 116 required:117 - data-lanes118 119 reg:120 minItems: 9121 maxItems: 9122 123 reg-names:124 items:125 - const: csiphy0126 - const: csiphy0_clk_mux127 - const: csiphy1128 - const: csiphy1_clk_mux129 - const: csid0130 - const: csid1131 - const: ispif132 - const: csi_clk_mux133 - const: vfe0134 135 vdda-supply:136 description:137 Definition of the regulator used as analog power supply.138 139required:140 - clock-names141 - clocks142 - compatible143 - interrupt-names144 - interrupts145 - iommus146 - power-domains147 - reg148 - reg-names149 - vdda-supply150 151additionalProperties: false152 153examples:154 - |155 #include <dt-bindings/interrupt-controller/arm-gic.h>156 #include <dt-bindings/clock/qcom,gcc-msm8916.h>157 158 camss: camss@1b0ac00 {159 compatible = "qcom,msm8916-camss";160 161 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,162 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,163 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,164 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,165 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,166 <&gcc GCC_CAMSS_CSI0_CLK>,167 <&gcc GCC_CAMSS_CSI0PHY_CLK>,168 <&gcc GCC_CAMSS_CSI0PIX_CLK>,169 <&gcc GCC_CAMSS_CSI0RDI_CLK>,170 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,171 <&gcc GCC_CAMSS_CSI1_CLK>,172 <&gcc GCC_CAMSS_CSI1PHY_CLK>,173 <&gcc GCC_CAMSS_CSI1PIX_CLK>,174 <&gcc GCC_CAMSS_CSI1RDI_CLK>,175 <&gcc GCC_CAMSS_AHB_CLK>,176 <&gcc GCC_CAMSS_VFE0_CLK>,177 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,178 <&gcc GCC_CAMSS_VFE_AHB_CLK>,179 <&gcc GCC_CAMSS_VFE_AXI_CLK>;180 181 clock-names = "top_ahb",182 "ispif_ahb",183 "csiphy0_timer",184 "csiphy1_timer",185 "csi0_ahb",186 "csi0",187 "csi0_phy",188 "csi0_pix",189 "csi0_rdi",190 "csi1_ahb",191 "csi1",192 "csi1_phy",193 "csi1_pix",194 "csi1_rdi",195 "ahb",196 "vfe0",197 "csi_vfe0",198 "vfe_ahb",199 "vfe_axi";200 201 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,202 <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,203 <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,204 <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,205 <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,206 <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;207 208 interrupt-names = "csiphy0",209 "csiphy1",210 "csid0",211 "csid1",212 "ispif",213 "vfe0";214 215 iommus = <&apps_iommu 3>;216 217 power-domains = <&gcc VFE_GDSC>;218 219 reg = <0x01b0ac00 0x200>,220 <0x01b00030 0x4>,221 <0x01b0b000 0x200>,222 <0x01b00038 0x4>,223 <0x01b08000 0x100>,224 <0x01b08400 0x100>,225 <0x01b0a000 0x500>,226 <0x01b00020 0x10>,227 <0x01b10000 0x1000>;228 229 reg-names = "csiphy0",230 "csiphy0_clk_mux",231 "csiphy1",232 "csiphy1_clk_mux",233 "csid0",234 "csid1",235 "ispif",236 "csi_clk_mux",237 "vfe0";238 239 vdda-supply = <®_2v8>;240 241 ports {242 #address-cells = <1>;243 #size-cells = <0>;244 };245 246 };247