brintos

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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/media/samsung,exynos4210-fimc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung S5P/Exynos SoC Fully Integrated Mobile Camera8 9maintainers:10  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>11  - Sylwester Nawrocki <s.nawrocki@samsung.com>12 13description:14  Each FIMC device should have an alias in the aliases node, in the form of15  fimc<n>, where <n> is an integer specifying the IP block instance.16 17properties:18  compatible:19    enum:20      - samsung,exynos4210-fimc21      - samsung,exynos4212-fimc22      - samsung,s5pv210-fimc23 24  reg:25    maxItems: 126 27  clocks:28    maxItems: 229 30  clock-names:31    items:32      - const: fimc33      - const: sclk_fimc34 35  clock-frequency:36    description:37      Maximum FIMC local clock (LCLK) frequency.38 39  interrupts:40    maxItems: 141 42  iommus:43    maxItems: 144 45  power-domains:46    maxItems: 147 48  samsung,cam-if:49    type: boolean50    description:51      The FIMC IP block includes the camera input interface.52 53  samsung,isp-wb:54    type: boolean55    description: |56      The FIMC IP block has the ISP writeback input.57 58  samsung,lcd-wb:59    type: boolean60    description: |61      The FIMC IP block has the LCD writeback input.62 63  samsung,mainscaler-ext:64    type: boolean65    description:66      FIMC IP supports extended image size and has CIEXTEN register.67 68  samsung,min-pix-alignment:69    $ref: /schemas/types.yaml#/definitions/uint32-array70    items:71      - description: Minimum supported image height alignment.72      - description: Horizontal image offset.73    description:74      The values are in pixels and default is <2 1>.75 76  samsung,min-pix-sizes:77    $ref: /schemas/types.yaml#/definitions/uint32-array78    maxItems: 279    description: |80      An array specifying minimum image size in pixels at the FIMC input and81      output DMA, in the first and second cell respectively.  Default value82      is <16 16>.83 84  samsung,pix-limits:85    $ref: /schemas/types.yaml#/definitions/uint32-array86    maxItems: 487    description: |88      An array of maximum supported image sizes in pixels, for details refer to89      Table 2-1 in the S5PV210 SoC User Manual. The meaning of each cell is as90      follows:91       0 - scaler input horizontal size92       1 - input horizontal size for the scaler bypassed93       2 - REAL_WIDTH without input rotation94       3 - REAL_HEIGHT with input rotation95 96  samsung,rotators:97    $ref: /schemas/types.yaml#/definitions/uint3298    default: 0x1199    description: |100      A bitmask specifying whether this IP has the input and the output101      rotator. Bits 4 and 0 correspond to input and output rotator102      respectively. If a rotator is present its corresponding bit should be103      set.104 105  samsung,sysreg:106    $ref: /schemas/types.yaml#/definitions/phandle107    description:108      System Registers (SYSREG) node.109 110required:111  - compatible112  - reg113  - clocks114  - clock-names115  - samsung,pix-limits116 117allOf:118  - if:119      required:120        - samsung,isp-wb121    then:122      required:123        - samsung,sysreg124 125additionalProperties: false126 127examples:128  - |129    #include <dt-bindings/clock/exynos4.h>130    #include <dt-bindings/interrupt-controller/arm-gic.h>131 132    fimc@11800000 {133        compatible = "samsung,exynos4212-fimc";134        reg = <0x11800000 0x1000>;135        clocks = <&clock CLK_FIMC0>,136                 <&clock CLK_SCLK_FIMC0>;137        clock-names = "fimc", "sclk_fimc";138        interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;139        iommus = <&sysmmu_fimc0>;140        power-domains = <&pd_cam>;141        samsung,sysreg = <&sys_reg>;142 143        samsung,pix-limits = <4224 8192 1920 4224>;144        samsung,mainscaler-ext;145        samsung,isp-wb;146        samsung,cam-if;147 148        assigned-clocks = <&clock CLK_MOUT_FIMC0>,149                          <&clock CLK_SCLK_FIMC0>;150        assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;151        assigned-clock-rates = <0>, <176000000>;152    };153