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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Calxeda DDR memory controller8 9description: |10 The Calxeda DDR memory controller is initialised and programmed by the11 firmware, but an OS might want to read its registers for error reporting12 purposes and to learn about the DRAM topology.13 14maintainers:15 - Andre Przywara <andre.przywara@arm.com>16 17properties:18 compatible:19 enum:20 - calxeda,hb-ddr-ctrl21 - calxeda,ecx-2000-ddr-ctrl22 23 reg:24 maxItems: 125 26 interrupts:27 maxItems: 128 29required:30 - compatible31 - reg32 - interrupts33 34additionalProperties: false35 36examples:37 - |38 memory-controller@fff00000 {39 compatible = "calxeda,hb-ddr-ctrl";40 reg = <0xfff00000 0x1000>;41 interrupts = <0 91 4>;42 };43