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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Renesas Reduced Pin Count Interface (RPC-IF)8 9maintainers:10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>11 12description: |13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to14 be accessed via the external address space read mode or the manual mode.15 16 The flash chip itself should be represented by a subnode of the RPC-IF node.17 The flash interface is selected based on the "compatible" property of this18 subnode:19 - if it contains "jedec,spi-nor", then SPI is used;20 - if it contains "cfi-flash", then HyperFlash is used.21 22allOf:23 - $ref: /schemas/spi/spi-controller.yaml#24 25properties:26 compatible:27 oneOf:28 - items:29 - enum:30 - renesas,r8a774a1-rpc-if # RZ/G2M31 - renesas,r8a774b1-rpc-if # RZ/G2N32 - renesas,r8a774c0-rpc-if # RZ/G2E33 - renesas,r8a774e1-rpc-if # RZ/G2H34 - renesas,r8a7795-rpc-if # R-Car H335 - renesas,r8a7796-rpc-if # R-Car M3-W36 - renesas,r8a77961-rpc-if # R-Car M3-W+37 - renesas,r8a77965-rpc-if # R-Car M3-N38 - renesas,r8a77970-rpc-if # R-Car V3M39 - renesas,r8a77980-rpc-if # R-Car V3H40 - renesas,r8a77990-rpc-if # R-Car E341 - renesas,r8a77995-rpc-if # R-Car D342 - renesas,r8a779a0-rpc-if # R-Car V3U43 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device44 45 - items:46 - enum:47 - renesas,r8a779g0-rpc-if # R-Car V4H48 - renesas,r8a779h0-rpc-if # R-Car V4M49 - const: renesas,rcar-gen4-rpc-if # a generic R-Car gen4 device50 51 - items:52 - enum:53 - renesas,r9a07g043-rpc-if # RZ/G2UL54 - renesas,r9a07g044-rpc-if # RZ/G2{L,LC}55 - renesas,r9a07g054-rpc-if # RZ/V2L56 - const: renesas,rzg2l-rpc-if57 58 reg:59 items:60 - description: RPC-IF registers61 - description: direct mapping read mode area62 - description: write buffer area63 64 reg-names:65 items:66 - const: regs67 - const: dirmap68 - const: wbuf69 70 clocks:71 minItems: 172 maxItems: 273 74 interrupts:75 maxItems: 176 77 power-domains:78 maxItems: 179 80 resets:81 maxItems: 182 83patternProperties:84 "flash@[0-9a-f]+$":85 type: object86 additionalProperties: true87 88 properties:89 compatible:90 contains:91 enum:92 - cfi-flash93 - jedec,spi-nor94 95required:96 - compatible97 - reg98 - reg-names99 - clocks100 - power-domains101 - resets102 - '#address-cells'103 - '#size-cells'104 105if:106 properties:107 compatible:108 contains:109 enum:110 - renesas,rzg2l-rpc-if111then:112 properties:113 clocks:114 items:115 - description: SPI Multi IO Register access clock (SPI_CLK2)116 - description: SPI Multi IO Main clock (SPI_CLK).117 118else:119 properties:120 clocks:121 maxItems: 1122 123unevaluatedProperties: false124 125examples:126 - |127 #include <dt-bindings/clock/renesas-cpg-mssr.h>128 #include <dt-bindings/power/r8a77995-sysc.h>129 130 spi@ee200000 {131 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";132 reg = <0xee200000 0x200>,133 <0x08000000 0x4000000>,134 <0xee208000 0x100>;135 reg-names = "regs", "dirmap", "wbuf";136 clocks = <&cpg CPG_MOD 917>;137 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;138 resets = <&cpg 917>;139 #address-cells = <1>;140 #size-cells = <0>;141 142 flash@0 {143 compatible = "jedec,spi-nor";144 reg = <0>;145 spi-max-frequency = <40000000>;146 spi-tx-bus-width = <1>;147 spi-rx-bus-width = <1>;148 };149 };150