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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/mfd/atmel,hlcdc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Atmel's HLCD Controller8 9maintainers:10 - Nicolas Ferre <nicolas.ferre@microchip.com>11 - Alexandre Belloni <alexandre.belloni@bootlin.com>12 - Claudiu Beznea <claudiu.beznea@tuxon.dev>13 14description:15 The Atmel HLCDC (HLCD Controller) IP available on Atmel SoCs exposes two16 subdevices, a PWM chip and a Display Controller.17 18properties:19 compatible:20 enum:21 - atmel,at91sam9n12-hlcdc22 - atmel,at91sam9x5-hlcdc23 - atmel,sama5d2-hlcdc24 - atmel,sama5d3-hlcdc25 - atmel,sama5d4-hlcdc26 - microchip,sam9x60-hlcdc27 - microchip,sam9x75-xlcdc28 29 reg:30 maxItems: 131 32 interrupts:33 maxItems: 134 35 clocks:36 minItems: 337 38 clock-names:39 items:40 - const: periph_clk41 - const: sys_clk42 - const: slow_clk43 - const: lvds_pll_clk44 minItems: 345 46 display-controller:47 $ref: /schemas/display/atmel/atmel,hlcdc-display-controller.yaml48 49 pwm:50 $ref: /schemas/pwm/atmel,hlcdc-pwm.yaml51 52required:53 - compatible54 - reg55 - clocks56 - clock-names57 - interrupts58 59additionalProperties: false60 61examples:62 - |63 #include <dt-bindings/clock/at91.h>64 #include <dt-bindings/dma/at91.h>65 #include <dt-bindings/interrupt-controller/arm-gic.h>66 67 lcd_controller: lcd-controller@f0030000 {68 compatible = "atmel,sama5d3-hlcdc";69 reg = <0xf0030000 0x2000>;70 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;71 clock-names = "periph_clk", "sys_clk", "slow_clk";72 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;73 74 display-controller {75 compatible = "atmel,hlcdc-display-controller";76 pinctrl-names = "default";77 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;78 #address-cells = <1>;79 #size-cells = <0>;80 81 port@0 {82 #address-cells = <1>;83 #size-cells = <0>;84 reg = <0>;85 86 hlcdc_panel_output: endpoint@0 {87 reg = <0>;88 remote-endpoint = <&panel_input>;89 };90 };91 };92 93 pwm {94 compatible = "atmel,hlcdc-pwm";95 pinctrl-names = "default";96 pinctrl-0 = <&pinctrl_lcd_pwm>;97 #pwm-cells = <3>;98 };99 };100