195 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Broadcom BCM63268 GPIO System Controller8 9maintainers:10 - Álvaro Fernández Rojas <noltari@gmail.com>11 - Jonas Gorski <jonas.gorski@gmail.com>12 13description:14 Broadcom BCM63268 SoC GPIO system controller which provides a register map15 for controlling the GPIO and pins of the SoC.16 17properties:18 "#address-cells": true19 20 "#size-cells": true21 22 compatible:23 items:24 - const: brcm,bcm63268-gpio-sysctl25 - const: syscon26 - const: simple-mfd27 28 ranges:29 maxItems: 130 31 reg:32 maxItems: 133 34patternProperties:35 "^gpio@[0-9a-f]+$":36 # Child node37 type: object38 $ref: /schemas/gpio/brcm,bcm63xx-gpio.yaml39 description:40 GPIO controller for the SoC GPIOs. This child node definition41 should follow the bindings specified in42 Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.43 44 "^pinctrl@[0-9a-f]+$":45 # Child node46 type: object47 $ref: /schemas/pinctrl/brcm,bcm63268-pinctrl.yaml48 description:49 Pin controller for the SoC pins. This child node definition50 should follow the bindings specified in51 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml.52 53required:54 - "#address-cells"55 - compatible56 - ranges57 - reg58 - "#size-cells"59 60additionalProperties: false61 62examples:63 - |64 syscon@100000c0 {65 #address-cells = <1>;66 #size-cells = <1>;67 compatible = "brcm,bcm63268-gpio-sysctl", "syscon", "simple-mfd";68 reg = <0x100000c0 0x80>;69 ranges = <0 0x100000c0 0x80>;70 71 gpio@0 {72 compatible = "brcm,bcm63268-gpio";73 reg-names = "dirout", "dat";74 reg = <0x0 0x8>, <0x8 0x8>;75 76 gpio-controller;77 gpio-ranges = <&pinctrl 0 0 52>;78 #gpio-cells = <2>;79 };80 81 pinctrl: pinctrl@10 {82 compatible = "brcm,bcm63268-pinctrl";83 reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>;84 85 pinctrl_serial_led: serial_led-pins {86 pinctrl_serial_led_clk: serial_led_clk-pins {87 function = "serial_led_clk";88 pins = "gpio0";89 };90 91 pinctrl_serial_led_data: serial_led_data-pins {92 function = "serial_led_data";93 pins = "gpio1";94 };95 };96 97 pinctrl_hsspi_cs4: hsspi_cs4-pins {98 function = "hsspi_cs4";99 pins = "gpio16";100 };101 102 pinctrl_hsspi_cs5: hsspi_cs5-pins {103 function = "hsspi_cs5";104 pins = "gpio17";105 };106 107 pinctrl_hsspi_cs6: hsspi_cs6-pins {108 function = "hsspi_cs6";109 pins = "gpio8";110 };111 112 pinctrl_hsspi_cs7: hsspi_cs7-pins {113 function = "hsspi_cs7";114 pins = "gpio9";115 };116 117 pinctrl_adsl_spi: adsl_spi-pins {118 pinctrl_adsl_spi_miso: adsl_spi_miso-pins {119 function = "adsl_spi_miso";120 pins = "gpio18";121 };122 123 pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {124 function = "adsl_spi_mosi";125 pins = "gpio19";126 };127 };128 129 pinctrl_vreq_clk: vreq_clk-pins {130 function = "vreq_clk";131 pins = "gpio22";132 };133 134 pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins {135 function = "pcie_clkreq_b";136 pins = "gpio23";137 };138 139 pinctrl_robosw_led_clk: robosw_led_clk-pins {140 function = "robosw_led_clk";141 pins = "gpio30";142 };143 144 pinctrl_robosw_led_data: robosw_led_data-pins {145 function = "robosw_led_data";146 pins = "gpio31";147 };148 149 pinctrl_nand: nand-pins {150 function = "nand";151 pins = "nand_grp";152 };153 154 pinctrl_gpio35_alt: gpio35_alt-pins {155 function = "gpio35_alt";156 pins = "gpio35";157 };158 159 pinctrl_dectpd: dectpd-pins {160 function = "dectpd";161 pins = "dectpd_grp";162 };163 164 pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {165 function = "vdsl_phy_override_0";166 pins = "vdsl_phy_override_0_grp";167 };168 169 pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {170 function = "vdsl_phy_override_1";171 pins = "vdsl_phy_override_1_grp";172 };173 174 pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {175 function = "vdsl_phy_override_2";176 pins = "vdsl_phy_override_2_grp";177 };178 179 pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {180 function = "vdsl_phy_override_3";181 pins = "vdsl_phy_override_3_grp";182 };183 184 pinctrl_dsl_gpio8: dsl_gpio8-pins {185 function = "dsl_gpio8";186 pins = "dsl_gpio8";187 };188 189 pinctrl_dsl_gpio9: dsl_gpio9-pins {190 function = "dsl_gpio9";191 pins = "dsl_gpio9";192 };193 };194 };195