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1* Microsemi MIPS CPUs2 3Boards with a SoC of the Microsemi MIPS family shall have the following4properties:5 6Required properties:7- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"8 9 10* Other peripherals:11 12o CPU chip regs:13 14The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous15functionalities: chip ID, general purpose register for software use, reset16controller, hardware status and configuration, efuses.17 18Required properties:19- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"20- reg : Should contain registers location and length21 22Example:23 syscon@71070000 {24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";25 reg = <0x71070000 0x1c>;26 };27 28o HSIO regs:29 30The SoC has a few registers (HSIO) handling miscellaneous functionalities:31configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and32status, SerDes muxing and a thermal sensor.33 34Required properties:35- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"36- reg : Should contain registers location and length37 38Example:39 syscon@10d0000 {40 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";41 reg = <0x10d0000 0x10000>;42 };43