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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Amlogic SD / eMMC controller for S905/GXBB family SoCs8 9description:10 The MMC 5.1 compliant host controller on Amlogic provides the11 interface for SD, eMMC and SDIO devices12 13maintainers:14 - Neil Armstrong <neil.armstrong@linaro.org>15 16allOf:17 - $ref: mmc-controller.yaml#18 19properties:20 compatible:21 oneOf:22 - const: amlogic,meson-axg-mmc23 - items:24 - const: amlogic,meson-gx-mmc25 - const: amlogic,meson-gxbb-mmc26 27 reg:28 maxItems: 129 30 interrupts:31 minItems: 132 items:33 - description: mmc controller instance34 - description: card detect35 36 clocks:37 maxItems: 338 39 clock-names:40 items:41 - const: core42 - const: clkin043 - const: clkin144 45 resets:46 maxItems: 147 48 amlogic,dram-access-quirk:49 type: boolean50 description:51 set when controller's internal DMA engine cannot access the DRAM memory,52 like on the G12A dedicated SDIO controller.53 54 power-domains:55 maxItems: 156 57required:58 - compatible59 - reg60 - interrupts61 - clocks62 - clock-names63 - resets64 65unevaluatedProperties: false66 67examples:68 - |69 #include <dt-bindings/interrupt-controller/irq.h>70 #include <dt-bindings/interrupt-controller/arm-gic.h>71 mmc@70000 {72 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";73 reg = <0x70000 0x2000>;74 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;75 clocks = <&clk_mmc>, <&xtal>, <&clk_div>;76 clock-names = "core", "clkin0", "clkin1";77 pinctrl-0 = <&emm_pins>;78 resets = <&reset_mmc>;79 };80