brintos

brintos / linux-shallow public Read only

0
0
Text · 7.9 KiB · af378b9 Raw
276 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Renesas SDHI SD/MMC controller8 9maintainers:10  - Wolfram Sang <wsa+renesas@sang-engineering.com>11 12properties:13  compatible:14    oneOf:15      - enum:16          - renesas,sdhi-mmc-r8a77470 # RZ/G1C17          - renesas,sdhi-r7s72100 # RZ/A1H18          - renesas,sdhi-r7s9210 # SH-Mobile AG519          - renesas,sdhi-r8a73a4 # R-Mobile APE620          - renesas,sdhi-r8a7740 # R-Mobile A121          - renesas,sdhi-r9a09g057 # RZ/V2H(P)22          - renesas,sdhi-sh73a0  # R-Mobile APE623      - items:24          - enum:25              - renesas,sdhi-r8a7778 # R-Car M126              - renesas,sdhi-r8a7779 # R-Car H127          - const: renesas,rcar-gen1-sdhi # R-Car Gen128      - items:29          - enum:30              - renesas,sdhi-r8a7742  # RZ/G1H31              - renesas,sdhi-r8a7743  # RZ/G1M32              - renesas,sdhi-r8a7744  # RZ/G1N33              - renesas,sdhi-r8a7745  # RZ/G1E34              - renesas,sdhi-r8a77470 # RZ/G1C35              - renesas,sdhi-r8a7790  # R-Car H236              - renesas,sdhi-r8a7791  # R-Car M2-W37              - renesas,sdhi-r8a7792  # R-Car V2H38              - renesas,sdhi-r8a7793  # R-Car M2-N39              - renesas,sdhi-r8a7794  # R-Car E240          - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G141      - items:42          - enum:43              - renesas,sdhi-r8a774a1  # RZ/G2M44              - renesas,sdhi-r8a774b1  # RZ/G2N45              - renesas,sdhi-r8a774c0  # RZ/G2E46              - renesas,sdhi-r8a774e1  # RZ/G2H47              - renesas,sdhi-r8a7795   # R-Car H348              - renesas,sdhi-r8a7796   # R-Car M3-W49              - renesas,sdhi-r8a77961  # R-Car M3-W+50              - renesas,sdhi-r8a77965  # R-Car M3-N51              - renesas,sdhi-r8a77970  # R-Car V3M52              - renesas,sdhi-r8a77980  # R-Car V3H53              - renesas,sdhi-r8a77990  # R-Car E354              - renesas,sdhi-r8a77995  # R-Car D355          - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G256      - items:57          - enum:58              - renesas,sdhi-r8a779a0  # R-Car V3U59              - renesas,sdhi-r8a779f0  # R-Car S4-860              - renesas,sdhi-r8a779g0  # R-Car V4H61              - renesas,sdhi-r8a779h0  # R-Car V4M62          - const: renesas,rcar-gen4-sdhi # R-Car Gen463      - items:64          - enum:65              - renesas,sdhi-r9a07g043 # RZ/G2UL and RZ/Five66              - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}67              - renesas,sdhi-r9a07g054 # RZ/V2L68              - renesas,sdhi-r9a08g045 # RZ/G3S69              - renesas,sdhi-r9a09g011 # RZ/V2M70          - const: renesas,rzg2l-sdhi71 72  reg:73    maxItems: 174 75  interrupts:76    minItems: 177    maxItems: 378 79  clocks:80    minItems: 181    maxItems: 482 83  clock-names:84    minItems: 185    maxItems: 486 87  dmas:88    minItems: 489    maxItems: 490 91  dma-names:92    minItems: 493    maxItems: 494    items:95      enum:96        - tx97        - rx98 99  iommus:100    maxItems: 1101 102  power-domains:103    maxItems: 1104 105  resets:106    maxItems: 1107 108  pinctrl-0:109    minItems: 1110    maxItems: 2111 112  pinctrl-1:113    maxItems: 1114 115  pinctrl-names: true116 117  max-frequency: true118 119allOf:120  - $ref: mmc-controller.yaml121 122  - if:123      properties:124        compatible:125          contains:126            enum:127              - renesas,sdhi-r9a09g057128              - renesas,rzg2l-sdhi129    then:130      properties:131        clocks:132          items:133            - description: IMCLK, SDHI channel main clock1.134            - description: CLK_HS, SDHI channel High speed clock which operates135                           4 times that of SDHI channel main clock1.136            - description: IMCLK2, SDHI channel main clock2. When this clock is137                           turned off, external SD card detection cannot be138                           detected.139            - description: ACLK, SDHI channel bus clock.140        clock-names:141          items:142            - const: core143            - const: clkh144            - const: cd145            - const: aclk146      required:147        - clock-names148        - resets149    else:150      if:151        properties:152          compatible:153            contains:154              enum:155                - renesas,rcar-gen2-sdhi156                - renesas,rcar-gen3-sdhi157                - renesas,rcar-gen4-sdhi158      then:159        properties:160          clocks:161            minItems: 1162            maxItems: 3163          clock-names:164            minItems: 1165            uniqueItems: true166            items:167              - const: core168              - enum: [ clkh, cd ]169              - const: cd170      else:171        properties:172          clocks:173            minItems: 1174            maxItems: 2175          clock-names:176            minItems: 1177            items:178              - const: core179              - const: cd180 181  - if:182      properties:183        compatible:184          contains:185            const: renesas,sdhi-mmc-r8a77470186    then:187      properties:188        pinctrl-names:189          items:190            - const: state_uhs191    else:192      properties:193        pinctrl-names:194          minItems: 1195          items:196            - const: default197            - const: state_uhs198 199  - if:200      properties:201        compatible:202          contains:203            enum:204              - renesas,sdhi-r7s72100205              - renesas,sdhi-r7s9210206    then:207      required:208        - clock-names209      description:210        The internal card detection logic that exists in these controllers is211        sectioned off to be run by a separate second clock source to allow212        the main core clock to be turned off to save power.213 214required:215  - compatible216  - reg217  - interrupts218  - clocks219  - power-domains220 221unevaluatedProperties: false222 223examples:224  - |225    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>226    #include <dt-bindings/interrupt-controller/arm-gic.h>227    #include <dt-bindings/power/r8a7790-sysc.h>228 229    sdhi0: mmc@ee100000 {230            compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";231            reg = <0xee100000 0x328>;232            interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;233            clocks = <&cpg CPG_MOD 314>;234            dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;235            dma-names = "tx", "rx", "tx", "rx";236            max-frequency = <195000000>;237            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;238            resets = <&cpg 314>;239    };240 241    sdhi1: mmc@ee120000 {242             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";243             reg = <0xee120000 0x328>;244             interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;245             clocks = <&cpg CPG_MOD 313>;246             dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;247             dma-names = "tx", "rx", "tx", "rx";248             max-frequency = <195000000>;249             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;250             resets = <&cpg 313>;251    };252 253    sdhi2: mmc@ee140000 {254             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";255             reg = <0xee140000 0x100>;256             interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;257             clocks = <&cpg CPG_MOD 312>;258             dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;259             dma-names = "tx", "rx", "tx", "rx";260             max-frequency = <97500000>;261             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;262             resets = <&cpg 312>;263     };264 265     sdhi3: mmc@ee160000 {266              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";267              reg = <0xee160000 0x100>;268              interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;269              clocks = <&cpg CPG_MOD 311>;270              dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;271              dma-names = "tx", "rx", "tx", "rx";272              max-frequency = <97500000>;273              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;274              resets = <&cpg 311>;275    };276