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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Rockchip designware mobile storage host controller8 9description:10 Rockchip uses the Synopsys designware mobile storage host controller11 to interface a SoC with storage medium such as eMMC or SD/MMC cards.12 This file documents the combined properties for the core Synopsys dw mshc13 controller that are not already included in the synopsys-dw-mshc-common.yaml14 file and the Rockchip specific extensions.15 16allOf:17 - $ref: synopsys-dw-mshc-common.yaml#18 19maintainers:20 - Heiko Stuebner <heiko@sntech.de>21 22# Everything else is described in the common file23properties:24 compatible:25 oneOf:26 # for Rockchip RK2928 and before RK328827 - const: rockchip,rk2928-dw-mshc28 # for Rockchip RK328829 - const: rockchip,rk3288-dw-mshc30 - items:31 - enum:32 - rockchip,px30-dw-mshc33 - rockchip,rk1808-dw-mshc34 - rockchip,rk3036-dw-mshc35 - rockchip,rk3128-dw-mshc36 - rockchip,rk3228-dw-mshc37 - rockchip,rk3308-dw-mshc38 - rockchip,rk3328-dw-mshc39 - rockchip,rk3368-dw-mshc40 - rockchip,rk3399-dw-mshc41 - rockchip,rk3568-dw-mshc42 - rockchip,rk3588-dw-mshc43 - rockchip,rv1108-dw-mshc44 - rockchip,rv1126-dw-mshc45 - const: rockchip,rk3288-dw-mshc46 # for Rockchip RK3576 with phase tuning inside the controller47 - const: rockchip,rk3576-dw-mshc48 49 reg:50 maxItems: 151 52 interrupts:53 maxItems: 154 55 clocks:56 minItems: 257 maxItems: 458 description:59 Handle to "biu" and "ciu" clocks for the bus interface unit clock and60 the card interface unit clock. If "ciu-drive" and "ciu-sample" are61 specified in clock-names, it should also contain62 handles to these clocks.63 64 clock-names:65 minItems: 266 items:67 - const: biu68 - const: ciu69 - const: ciu-drive70 - const: ciu-sample71 description:72 Apart from the clock-names "biu" and "ciu" two more clocks73 "ciu-drive" and "ciu-sample" are supported. They are used74 to control the clock phases, "ciu-sample" is required for tuning75 high speed modes.76 77 power-domains:78 maxItems: 179 80 rockchip,default-sample-phase:81 $ref: /schemas/types.yaml#/definitions/uint3282 minimum: 083 maximum: 36084 default: 085 description:86 The default phase to set "ciu-sample" at probing,87 low speeds or in case where all phases work at tuning time.88 If not specified 0 deg will be used.89 90 rockchip,desired-num-phases:91 $ref: /schemas/types.yaml#/definitions/uint3292 minimum: 093 maximum: 36094 default: 36095 description:96 The desired number of times that the host execute tuning when needed.97 If not specified, the host will do tuning for 360 times,98 namely tuning for each degree.99 100required:101 - compatible102 - reg103 - interrupts104 - clocks105 - clock-names106 107unevaluatedProperties: false108 109examples:110 - |111 #include <dt-bindings/clock/rk3288-cru.h>112 #include <dt-bindings/interrupt-controller/arm-gic.h>113 #include <dt-bindings/interrupt-controller/irq.h>114 sdmmc: mmc@ff0c0000 {115 compatible = "rockchip,rk3288-dw-mshc";116 reg = <0xff0c0000 0x4000>;117 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;118 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,119 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;120 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";121 resets = <&cru SRST_MMC0>;122 reset-names = "reset";123 fifo-depth = <0x100>;124 max-frequency = <150000000>;125 };126 127...128