121 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-only2%YAML 1.23---4$id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Marvell PXA SDHCI v1/v2/v38 9maintainers:10 - Ulf Hansson <ulf.hansson@linaro.org>11 12allOf:13 - $ref: mmc-controller.yaml#14 - if:15 properties:16 compatible:17 contains:18 const: marvell,armada-380-sdhci19 then:20 properties:21 reg:22 minItems: 323 reg-names:24 minItems: 325 required:26 - reg-names27 else:28 properties:29 reg:30 maxItems: 131 reg-names:32 maxItems: 133 34properties:35 compatible:36 enum:37 - mrvl,pxav1-mmc38 - mrvl,pxav2-mmc39 - mrvl,pxav3-mmc40 - marvell,armada-380-sdhci41 42 reg:43 minItems: 144 maxItems: 345 46 reg-names:47 items:48 - const: sdhci49 - const: mbus50 - const: conf-sdio351 52 interrupts:53 maxItems: 154 55 clocks:56 minItems: 157 maxItems: 258 59 clock-names:60 minItems: 161 items:62 - const: io63 - const: core64 65 pinctrl-names:66 description:67 Optional for supporting PXA168 SDIO IRQ errata to switch CMD pin between68 SDIO CMD and GPIO mode.69 items:70 - const: default71 - const: state_cmd_gpio72 73 pinctrl-0:74 description:75 Should contain default pinctrl.76 77 pinctrl-1:78 description:79 Should switch CMD pin to GPIO mode as a high output.80 81 mrvl,clk-delay-cycles:82 description: Specify a number of cycles to delay for tuning.83 $ref: /schemas/types.yaml#/definitions/uint3284 85required:86 - compatible87 - reg88 - interrupts89 - clocks90 - clock-names91 92unevaluatedProperties: false93 94examples:95 - |96 #include <dt-bindings/clock/berlin2.h>97 mmc@d4280800 {98 compatible = "mrvl,pxav3-mmc";99 reg = <0xd4280800 0x800>;100 bus-width = <8>;101 interrupts = <27>;102 clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;103 clock-names = "io", "core";104 non-removable;105 mrvl,clk-delay-cycles = <31>;106 };107 - |108 mmc@d8000 {109 compatible = "marvell,armada-380-sdhci";110 reg-names = "sdhci", "mbus", "conf-sdio3";111 reg = <0xd8000 0x1000>,112 <0xdc000 0x100>,113 <0x18454 0x4>;114 interrupts = <0 25 0x4>;115 clocks = <&gateclk 17>;116 clock-names = "io";117 mrvl,clk-delay-cycles = <0x1F>;118 };119 120...121