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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Synopsys Designware Mobile Storage Host Controller Common Properties8 9allOf:10 - $ref: mmc-controller.yaml#11 12maintainers:13 - Ulf Hansson <ulf.hansson@linaro.org>14 15# Everything else is described in the common file16properties:17 resets:18 maxItems: 119 20 reset-names:21 const: reset22 23 clock-frequency:24 description:25 Should be the frequency (in Hz) of the ciu clock. If this26 is specified and the ciu clock is specified then we'll try to set the ciu27 clock to this at probe time.28 29 fifo-depth:30 description:31 The maximum size of the tx/rx fifo's. If this property is not32 specified, the default value of the fifo size is determined from the33 controller registers.34 $ref: /schemas/types.yaml#/definitions/uint3235 36 card-detect-delay:37 description:38 Delay in milli-seconds before detecting card after card39 insert event. The default value is 0.40 $ref: /schemas/types.yaml#/definitions/uint3241 default: 042 43 data-addr:44 description:45 Override fifo address with value provided by DT. The default FIFO reg46 offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A)47 by driver. If the controller does not follow this rule, please use48 this property to set fifo address in device tree.49 $ref: /schemas/types.yaml#/definitions/uint3250 51 fifo-watermark-aligned:52 description:53 Data done irq is expected if data length is less than54 watermark in PIO mode. But fifo watermark is requested to be aligned55 with data length in some SoC so that TX/RX irq can be generated with56 data done irq. Add this watermark quirk to mark this requirement and57 force fifo watermark setting accordingly.58 $ref: /schemas/types.yaml#/definitions/flag59 60 dmas:61 maxItems: 162 63 dma-names:64 const: rx-tx65 66additionalProperties: true67