brintos

brintos / linux-shallow public Read only

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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/net/actions,owl-emac.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Actions Semi Owl SoCs Ethernet MAC Controller8 9maintainers:10  - Cristian Ciocaltea <cristian.ciocaltea@gmail.com>11 12description: |13  This Ethernet MAC is used on the Owl family of SoCs from Actions Semi.14  It provides the RMII and SMII interfaces and is compliant with the15  IEEE 802.3 CSMA/CD standard, supporting both half-duplex and full-duplex16  operation modes at 10/100 Mb/s data transfer rates.17 18allOf:19  - $ref: ethernet-controller.yaml#20 21properties:22  compatible:23    oneOf:24      - const: actions,owl-emac25      - items:26          - enum:27              - actions,s500-emac28          - const: actions,owl-emac29 30  reg:31    maxItems: 132 33  interrupts:34    maxItems: 135 36  clocks:37    minItems: 238    maxItems: 239 40  clock-names:41    additionalItems: false42    items:43      - const: eth44      - const: rmii45 46  resets:47    maxItems: 148 49  actions,ethcfg:50    $ref: /schemas/types.yaml#/definitions/phandle51    description:52      Phandle to the device containing custom config.53 54  mdio:55    $ref: mdio.yaml#56    unevaluatedProperties: false57 58required:59  - compatible60  - reg61  - interrupts62  - clocks63  - clock-names64  - resets65  - phy-mode66  - phy-handle67 68unevaluatedProperties: false69 70examples:71  - |72    #include <dt-bindings/clock/actions,s500-cmu.h>73    #include <dt-bindings/interrupt-controller/arm-gic.h>74    #include <dt-bindings/reset/actions,s500-reset.h>75 76    ethernet@b0310000 {77        compatible = "actions,s500-emac", "actions,owl-emac";78        reg = <0xb0310000 0x10000>;79        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;80        clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>;81        clock-names = "eth", "rmii";82        resets = <&cmu RESET_ETHERNET>;83        phy-mode = "rmii";84        phy-handle = <&eth_phy>;85 86        mdio {87            #address-cells = <1>;88            #size-cells = <0>;89 90            eth_phy: ethernet-phy@3 {91                reg = <0x3>;92                interrupt-parent = <&sirq>;93                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;94            };95        };96    };97