325 lines · yaml
1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A83t EMAC8 9maintainers:10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>12 13properties:14 compatible:15 oneOf:16 - const: allwinner,sun8i-a83t-emac17 - const: allwinner,sun8i-h3-emac18 - const: allwinner,sun8i-r40-gmac19 - const: allwinner,sun8i-v3s-emac20 - const: allwinner,sun50i-a64-emac21 - items:22 - enum:23 - allwinner,sun20i-d1-emac24 - allwinner,sun50i-h6-emac25 - allwinner,sun50i-h616-emac026 - const: allwinner,sun50i-a64-emac27 28 reg:29 maxItems: 130 31 interrupts:32 maxItems: 133 34 interrupt-names:35 const: macirq36 37 clocks:38 maxItems: 139 40 clock-names:41 const: stmmaceth42 43 phy-supply:44 description: PHY regulator45 46 syscon:47 $ref: /schemas/types.yaml#/definitions/phandle48 description:49 Phandle to the device containing the EMAC or GMAC clock50 register51 52required:53 - compatible54 - reg55 - interrupts56 - interrupt-names57 - clocks58 - clock-names59 - resets60 - reset-names61 - phy-handle62 - phy-mode63 - syscon64 65allOf:66 - $ref: snps,dwmac.yaml#67 - if:68 properties:69 compatible:70 contains:71 enum:72 - allwinner,sun8i-a83t-emac73 - allwinner,sun8i-h3-emac74 - allwinner,sun8i-v3s-emac75 - allwinner,sun50i-a64-emac76 77 then:78 properties:79 allwinner,tx-delay-ps:80 default: 081 minimum: 082 maximum: 70083 multipleOf: 10084 description:85 External RGMII PHY TX clock delay chain value in ps.86 87 allwinner,rx-delay-ps:88 default: 089 minimum: 090 maximum: 310091 multipleOf: 10092 description:93 External RGMII PHY TX clock delay chain value in ps.94 95 - if:96 properties:97 compatible:98 contains:99 enum:100 - allwinner,sun8i-r40-gmac101 102 then:103 properties:104 allwinner,rx-delay-ps:105 default: 0106 minimum: 0107 maximum: 700108 multipleOf: 100109 description:110 External RGMII PHY TX clock delay chain value in ps.111 112 - if:113 properties:114 compatible:115 contains:116 enum:117 - allwinner,sun8i-h3-emac118 - allwinner,sun8i-v3s-emac119 120 then:121 properties:122 allwinner,leds-active-low:123 $ref: /schemas/types.yaml#/definitions/flag124 description:125 EPHY LEDs are active low.126 127 mdio-mux:128 type: object129 unevaluatedProperties: false130 131 properties:132 compatible:133 const: allwinner,sun8i-h3-mdio-mux134 135 mdio-parent-bus:136 $ref: /schemas/types.yaml#/definitions/phandle137 description:138 Phandle to EMAC MDIO.139 140 "#address-cells":141 const: 1142 143 "#size-cells":144 const: 0145 146 mdio@1:147 $ref: mdio.yaml#148 unevaluatedProperties: false149 description: Internal MDIO Bus150 151 properties:152 compatible:153 const: allwinner,sun8i-h3-mdio-internal154 155 reg:156 const: 1157 158 patternProperties:159 "^ethernet-phy@[0-9a-f]$":160 type: object161 $ref: ethernet-phy.yaml#162 unevaluatedProperties: false163 description:164 Integrated PHY node165 166 properties:167 clocks:168 maxItems: 1169 170 resets:171 maxItems: 1172 173 required:174 - clocks175 - resets176 177 178 mdio@2:179 $ref: mdio.yaml#180 unevaluatedProperties: false181 description: External MDIO Bus (H3 only)182 183 properties:184 reg:185 const: 2186 187 required:188 - compatible189 - mdio-parent-bus190 - mdio@1191 192unevaluatedProperties: false193 194examples:195 - |196 ethernet@1c0b000 {197 compatible = "allwinner,sun8i-h3-emac";198 syscon = <&syscon>;199 reg = <0x01c0b000 0x104>;200 interrupts = <0 82 1>;201 interrupt-names = "macirq";202 resets = <&ccu 12>;203 reset-names = "stmmaceth";204 clocks = <&ccu 27>;205 clock-names = "stmmaceth";206 207 phy-handle = <&int_mii_phy>;208 phy-mode = "mii";209 allwinner,leds-active-low;210 211 mdio1: mdio {212 #address-cells = <1>;213 #size-cells = <0>;214 compatible = "snps,dwmac-mdio";215 };216 217 mdio-mux {218 compatible = "allwinner,sun8i-h3-mdio-mux";219 #address-cells = <1>;220 #size-cells = <0>;221 222 mdio-parent-bus = <&mdio1>;223 224 int_mii_phy: mdio@1 {225 compatible = "allwinner,sun8i-h3-mdio-internal";226 reg = <1>;227 #address-cells = <1>;228 #size-cells = <0>;229 230 ethernet-phy@1 {231 reg = <1>;232 clocks = <&ccu 67>;233 resets = <&ccu 39>;234 phy-is-integrated;235 };236 };237 238 mdio@2 {239 reg = <2>;240 #address-cells = <1>;241 #size-cells = <0>;242 };243 };244 };245 246 - |247 ethernet@1c0b000 {248 compatible = "allwinner,sun8i-h3-emac";249 syscon = <&syscon>;250 reg = <0x01c0b000 0x104>;251 interrupts = <0 82 1>;252 interrupt-names = "macirq";253 resets = <&ccu 12>;254 reset-names = "stmmaceth";255 clocks = <&ccu 27>;256 clock-names = "stmmaceth";257 258 phy-handle = <&ext_rgmii_phy>;259 phy-mode = "rgmii";260 allwinner,leds-active-low;261 262 mdio2: mdio {263 #address-cells = <1>;264 #size-cells = <0>;265 compatible = "snps,dwmac-mdio";266 };267 268 mdio-mux {269 compatible = "allwinner,sun8i-h3-mdio-mux";270 #address-cells = <1>;271 #size-cells = <0>;272 mdio-parent-bus = <&mdio2>;273 274 mdio@1 {275 compatible = "allwinner,sun8i-h3-mdio-internal";276 reg = <1>;277 #address-cells = <1>;278 #size-cells = <0>;279 280 ethernet-phy@1 {281 reg = <1>;282 clocks = <&ccu 67>;283 resets = <&ccu 39>;284 };285 };286 287 mdio@2 {288 reg = <2>;289 #address-cells = <1>;290 #size-cells = <0>;291 292 ext_rgmii_phy: ethernet-phy@1 {293 reg = <1>;294 };295 };296 };297 };298 299 - |300 ethernet@1c0b000 {301 compatible = "allwinner,sun8i-a83t-emac";302 syscon = <&syscon>;303 reg = <0x01c0b000 0x104>;304 interrupts = <0 82 1>;305 interrupt-names = "macirq";306 resets = <&ccu 13>;307 reset-names = "stmmaceth";308 clocks = <&ccu 27>;309 clock-names = "stmmaceth";310 phy-handle = <&ext_rgmii_phy1>;311 phy-mode = "rgmii";312 313 mdio {314 compatible = "snps,dwmac-mdio";315 #address-cells = <1>;316 #size-cells = <0>;317 318 ext_rgmii_phy1: ethernet-phy@1 {319 reg = <1>;320 };321 };322 };323 324...325