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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Faraday Technology FTGMAC100 gigabit ethernet controller8 9allOf:10 - $ref: ethernet-controller.yaml#11 12maintainers:13 - Po-Yu Chuang <ratbert@faraday-tech.com>14 15properties:16 compatible:17 oneOf:18 - const: faraday,ftgmac10019 - items:20 - enum:21 - aspeed,ast2400-mac22 - aspeed,ast2500-mac23 - aspeed,ast2600-mac24 - const: faraday,ftgmac10025 26 reg:27 maxItems: 128 29 interrupts:30 maxItems: 131 32 clocks:33 minItems: 134 items:35 - description: MAC IP clock36 - description: RMII RCLK gate for AST2500/260037 38 clock-names:39 minItems: 140 items:41 - const: MACCLK42 - const: RCLK43 44 phy-mode:45 enum:46 - rgmii47 - rmii48 49 phy-handle: true50 51 use-ncsi:52 description:53 Use the NC-SI stack instead of an MDIO PHY. Currently assumes54 rmii (100bT) but kept as a separate property in case NC-SI grows support55 for a gigabit link.56 type: boolean57 58 no-hw-checksum:59 description:60 Used to disable HW checksum support. Here for backward61 compatibility as the driver now should have correct defaults based on62 the SoC.63 type: boolean64 deprecated: true65 66 mdio:67 $ref: /schemas/net/mdio.yaml#68 69required:70 - compatible71 - reg72 - interrupts73 74unevaluatedProperties: false75 76examples:77 - |78 ethernet@1e660000 {79 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";80 reg = <0x1e660000 0x180>;81 interrupts = <2>;82 use-ncsi;83 };84 85 ethernet@1e680000 {86 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";87 reg = <0x1e680000 0x180>;88 interrupts = <2>;89 90 phy-handle = <&phy>;91 phy-mode = "rgmii";92 93 mdio {94 #address-cells = <1>;95 #size-cells = <0>;96 97 phy: ethernet-phy@1 {98 compatible = "ethernet-phy-ieee802.3-c22";99 reg = <1>;100 };101 };102 };103