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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP FMan MAC8 9maintainers:10  - Madalin Bucur <madalin.bucur@nxp.com>11 12description: |13  Each FMan has several MACs, each implementing an Ethernet interface. Earlier14  versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for15  10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller16  (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate17  Ethernet Media Access Controller (mEMAC) to handle all speeds.18 19properties:20  compatible:21    enum:22      - fsl,fman-dtsec23      - fsl,fman-xgec24      - fsl,fman-memac25 26  cell-index:27    maximum: 6428    description: |29      FManV2:30      register[bit]           MAC             cell-index31      ============================================================32      FM_EPI[16]              XGEC            833      FM_EPI[16+n]            dTSECn          n-134      FM_NPI[11+n]            dTSECn          n-135              n = 1,..,536 37      FManV3:38      register[bit]           MAC             cell-index39      ============================================================40      FM_EPI[16+n]            mEMACn          n-141      FM_EPI[25]              mEMAC10         942 43      FM_NPI[11+n]            mEMACn          n-144      FM_NPI[10]              mEMAC10         945      FM_NPI[11]              mEMAC9          846              n = 1,..847 48      FM_EPI and FM_NPI are located in the FMan memory map.49 50      2. SoC registers:51 52      - P2041, P3041, P4080 P5020, P5040:53      register[bit]           FMan            MAC             cell54                              Unit                            index55      ============================================================56      DCFG_DEVDISR2[7]        1               XGEC            857      DCFG_DEVDISR2[7+n]      1               dTSECn          n-158      DCFG_DEVDISR2[15]       2               XGEC            859      DCFG_DEVDISR2[15+n]     2               dTSECn          n-160              n = 1,..561 62      - T1040, T2080, T4240, B4860:63      register[bit]                   FMan    MAC             cell64                                      Unit                    index65      ============================================================66      DCFG_CCSR_DEVDISR2[n-1]         1       mEMACn          n-167      DCFG_CCSR_DEVDISR2[11+n]        2       mEMACn          n-168              n = 1,..6,9,1069 70      EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in71      the specific SoC "Device Configuration/Pin Control" Memory72      Map.73 74  reg:75    maxItems: 176 77  fsl,fman-ports:78    $ref: /schemas/types.yaml#/definitions/phandle-array79    maxItems: 280    description: |81      An array of two references: the first is the FMan RX port and the second82      is the TX port used by this MAC.83 84  ptp-timer:85    $ref: /schemas/types.yaml#/definitions/phandle86    description: A reference to the IEEE1588 timer87 88  phys:89    description: A reference to the SerDes lane(s)90    maxItems: 191 92  phy-names:93    items:94      - const: serdes95 96  pcsphy-handle:97    $ref: /schemas/types.yaml#/definitions/phandle-array98    minItems: 199    maxItems: 3100    deprecated: true101    description: See pcs-handle.102 103  pcs-handle:104    minItems: 1105    maxItems: 3106    description: |107      A reference to the various PCSs (typically found on the SerDes). If108      pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first109      reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is110      absent, then the first reference will be assumed to be for "sgmii".111 112  pcs-handle-names:113    minItems: 1114    maxItems: 3115    items:116      enum:117        - sgmii118        - qsgmii119        - xfi120    description: The type of each PCS in pcsphy-handle.121 122  tbi-handle:123    $ref: /schemas/types.yaml#/definitions/phandle124    description: A reference to the (TBI-based) PCS125 126required:127  - compatible128  - cell-index129  - reg130  - fsl,fman-ports131 132dependencies:133  pcs-handle-names:134    - pcs-handle135 136allOf:137  - $ref: ethernet-controller.yaml#138  - if:139      properties:140        compatible:141          contains:142            const: fsl,fman-dtsec143    then:144      required:145        - tbi-handle146 147unevaluatedProperties: false148 149examples:150  - |151    ethernet@e0000 {152            compatible = "fsl,fman-dtsec";153            cell-index = <0>;154            reg = <0xe0000 0x1000>;155            fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;156            ptp-timer = <&ptp_timer>;157            tbi-handle = <&tbi0>;158    };159  - |160    ethernet@e8000 {161            cell-index = <4>;162            compatible = "fsl,fman-memac";163            reg = <0xe8000 0x1000>;164            fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;165            ptp-timer = <&ptp_timer0>;166            pcs-handle = <&pcsphy4>, <&qsgmiib_pcs1>;167            pcs-handle-names = "sgmii", "qsgmii";168            phys = <&serdes1 1>;169            phy-names = "serdes";170    };171...172