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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/net/microchip,lan8650.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Microchip LAN8650/1 10BASE-T1S MACPHY Ethernet Controllers8 9maintainers:10 - Parthiban Veerasooran <parthiban.veerasooran@microchip.com>11 12description:13 The LAN8650/1 combines a Media Access Controller (MAC) and an Ethernet14 PHY to enable 10BASE‑T1S networks. The Ethernet Media Access Controller15 (MAC) module implements a 10 Mbps half duplex Ethernet MAC, compatible16 with the IEEE 802.3 standard and a 10BASE-T1S physical layer transceiver17 integrated into the LAN8650/1. The communication between the Host and18 the MAC-PHY is specified in the OPEN Alliance 10BASE-T1x MACPHY Serial19 Interface (TC6).20 21allOf:22 - $ref: /schemas/net/ethernet-controller.yaml#23 - $ref: /schemas/spi/spi-peripheral-props.yaml#24 25properties:26 compatible:27 oneOf:28 - const: microchip,lan865029 - items:30 - const: microchip,lan865131 - const: microchip,lan865032 33 reg:34 maxItems: 135 36 interrupts:37 description:38 Interrupt from MAC-PHY asserted in the event of Receive Chunks39 Available, Transmit Chunk Credits Available and Extended Status40 Event.41 maxItems: 142 43 spi-max-frequency:44 minimum: 1500000045 maximum: 2500000046 47required:48 - compatible49 - reg50 - interrupts51 - spi-max-frequency52 53unevaluatedProperties: false54 55examples:56 - |57 #include <dt-bindings/interrupt-controller/irq.h>58 #include <dt-bindings/gpio/gpio.h>59 60 spi {61 #address-cells = <1>;62 #size-cells = <0>;63 64 ethernet@0 {65 compatible = "microchip,lan8651", "microchip,lan8650";66 reg = <0>;67 pinctrl-names = "default";68 pinctrl-0 = <ð0_pins>;69 interrupt-parent = <&gpio>;70 interrupts = <6 IRQ_TYPE_EDGE_FALLING>;71 local-mac-address = [04 05 06 01 02 03];72 spi-max-frequency = <15000000>;73 };74 };75