171 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Marvell International Ltd. NCI NFC controller8 9maintainers:10 - Krzysztof Kozlowski <krzk@kernel.org>11 12properties:13 compatible:14 enum:15 - marvell,nfc-i2c16 - marvell,nfc-spi17 - marvell,nfc-uart18 19 hci-muxed:20 type: boolean21 description: |22 Specifies that the chip is muxing NCI over HCI frames23 24 interrupts:25 maxItems: 126 27 reg:28 maxItems: 129 30 reset-n-io:31 $ref: /schemas/types.yaml#/definitions/phandle-array32 maxItems: 133 description: |34 Output GPIO pin used to reset the chip (active low)35 36 i2c-int-falling:37 type: boolean38 description: |39 For I2C type of connection. Specifies that the chip read event shall be40 triggered on falling edge.41 42 i2c-int-rising:43 type: boolean44 description: |45 For I2C type of connection. Specifies that the chip read event shall be46 triggered on rising edge.47 48 break-control:49 type: boolean50 description: |51 For UART type of connection. Specifies that the chip needs specific break52 management.53 54 flow-control:55 type: boolean56 description: |57 For UART type of connection. Specifies that the chip is using RTS/CTS.58 59 spi-cpha: true60 spi-cpol: true61 62required:63 - compatible64 65allOf:66 - if:67 properties:68 compatible:69 contains:70 const: marvell,nfc-i2c71 then:72 properties:73 break-control: false74 flow-control: false75 spi-cpha: false76 spi-cpol: false77 spi-max-frequency: false78 required:79 - reg80 81 - if:82 properties:83 compatible:84 contains:85 const: marvell,nfc-spi86 then:87 $ref: /schemas/spi/spi-peripheral-props.yaml#88 properties:89 break-control: false90 flow-control: false91 i2c-int-falling: false92 i2c-int-rising: false93 required:94 - reg95 96 - if:97 properties:98 compatible:99 contains:100 const: marvell,nfc-uart101 then:102 properties:103 i2c-int-falling: false104 i2c-int-rising: false105 interrupts: false106 spi-cpha: false107 spi-cpol: false108 spi-max-frequency: false109 reg: false110 111unevaluatedProperties: false112 113examples:114 - |115 #include <dt-bindings/gpio/gpio.h>116 #include <dt-bindings/interrupt-controller/irq.h>117 118 i2c {119 #address-cells = <1>;120 #size-cells = <0>;121 122 nfc@8 {123 compatible = "marvell,nfc-i2c";124 reg = <0x8>;125 126 interrupt-parent = <&gpio3>;127 interrupts = <21 IRQ_TYPE_EDGE_RISING>;128 129 i2c-int-rising;130 131 reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>;132 };133 };134 135 - |136 #include <dt-bindings/gpio/gpio.h>137 #include <dt-bindings/interrupt-controller/irq.h>138 139 spi {140 #address-cells = <1>;141 #size-cells = <0>;142 143 nfc@0 {144 compatible = "marvell,nfc-spi";145 reg = <0>;146 147 spi-max-frequency = <3000000>;148 spi-cpha;149 spi-cpol;150 151 interrupt-parent = <&gpio1>;152 interrupts = <17 IRQ_TYPE_EDGE_RISING>;153 154 reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>;155 };156 };157 158 - |159 #include <dt-bindings/gpio/gpio.h>160 161 uart {162 nfc {163 compatible = "marvell,nfc-uart";164 165 reset-n-io = <&gpio3 16 GPIO_ACTIVE_LOW>;166 167 hci-muxed;168 flow-control;169 };170 };171