104 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP i.MX8/9 DWMAC glue layer8 9maintainers:10 - Clark Wang <xiaoning.wang@nxp.com>11 - Shawn Guo <shawnguo@kernel.org>12 - NXP Linux Team <linux-imx@nxp.com>13 14# We need a select here so we don't match all nodes with 'snps,dwmac'15select:16 properties:17 compatible:18 contains:19 enum:20 - nxp,imx8mp-dwmac-eqos21 - nxp,imx8dxl-dwmac-eqos22 - nxp,imx93-dwmac-eqos23 required:24 - compatible25 26allOf:27 - $ref: snps,dwmac.yaml#28 29properties:30 compatible:31 oneOf:32 - items:33 - enum:34 - nxp,imx8mp-dwmac-eqos35 - nxp,imx8dxl-dwmac-eqos36 - nxp,imx93-dwmac-eqos37 - const: snps,dwmac-5.10a38 39 clocks:40 minItems: 341 items:42 - description: MAC host clock43 - description: MAC apb clock44 - description: MAC timer clock45 - description: MAC RGMII TX clock46 - description: EQOS MEM clock47 48 clock-names:49 minItems: 350 maxItems: 551 contains:52 enum:53 - stmmaceth54 - pclk55 - ptp_ref56 - tx57 - mem58 59 intf_mode:60 $ref: /schemas/types.yaml#/definitions/phandle-array61 items:62 - items:63 - description: phandle to the GPR syscon64 - description: the offset of the GPR register65 description:66 Should be phandle/offset pair. The phandle to the syscon node which67 encompases the GPR register, and the offset of the GPR register.68 69 nvmem-cells: true70 71 nvmem-cell-names: true72 73 snps,rmii_refclk_ext:74 $ref: /schemas/types.yaml#/definitions/flag75 description:76 To select RMII reference clock from external.77 78required:79 - compatible80 - clocks81 - clock-names82 83unevaluatedProperties: false84 85examples:86 - |87 #include <dt-bindings/interrupt-controller/arm-gic.h>88 #include <dt-bindings/interrupt-controller/irq.h>89 #include <dt-bindings/clock/imx8mp-clock.h>90 91 eqos: ethernet@30bf0000 {92 compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";93 reg = <0x30bf0000 0x10000>;94 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,95 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;96 interrupt-names = "macirq", "eth_wake_irq";97 clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,98 <&clk IMX8MP_CLK_QOS_ENET_ROOT>,99 <&clk IMX8MP_CLK_ENET_QOS_TIMER>,100 <&clk IMX8MP_CLK_ENET_QOS>;101 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";102 phy-mode = "rgmii";103 };104