185 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/net/qcom,qca807x.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm QCA807x Ethernet PHY8 9maintainers:10 - Christian Marangi <ansuelsmth@gmail.com>11 - Robert Marko <robert.marko@sartura.hr>12 13description: |14 Qualcomm QCA8072/5 Ethernet PHY is PHY package of 2 or 515 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and16 1000BASE-T PHY-s.17 18 They feature 2 SerDes, one for PSGMII or QSGMII connection with19 MAC, while second one is SGMII for connection to MAC or fiber.20 21 Both models have a combo port that supports 1000BASE-X and22 100BASE-FX fiber.23 24 Each PHY inside of QCA807x series has 4 digitally controlled25 output only pins that natively drive LED-s for up to 2 attached26 LEDs. Some vendor also use these 4 output for GPIO usage without27 attaching LEDs.28 29 Note that output pins can be set to drive LEDs OR GPIO, mixed30 definition are not accepted.31 32$ref: ethernet-phy-package.yaml#33 34properties:35 compatible:36 enum:37 - qcom,qca8072-package38 - qcom,qca8075-package39 40 qcom,package-mode:41 description: |42 PHY package can be configured in 3 mode following this table:43 44 First Serdes mode Second Serdes mode45 Option 1 PSGMII for copper Disabled46 ports 0-447 Option 2 PSGMII for copper 1000BASE-X / 100BASE-FX48 ports 0-449 Option 3 QSGMII for copper SGMII for50 ports 0-3 copper port 451 52 PSGMII mode (option 1 or 2) is configured dynamically based on53 the presence of a connected SFP device.54 $ref: /schemas/types.yaml#/definitions/string55 enum:56 - qsgmii57 - psgmii58 default: psgmii59 60 qcom,tx-drive-strength-milliwatt:61 description: set the TX Amplifier value in mv.62 $ref: /schemas/types.yaml#/definitions/uint3263 enum: [140, 160, 180, 200, 220,64 240, 260, 280, 300, 320,65 400, 500, 600]66 default: 60067 68patternProperties:69 ^ethernet-phy@[a-f0-9]+$:70 $ref: ethernet-phy.yaml#71 72 properties:73 qcom,dac-full-amplitude:74 description:75 Set Analog MDI driver amplitude to FULL.76 77 With this not defined, amplitude is set to DSP.78 (amplitude is adjusted based on cable length)79 80 With this enabled and qcom,dac-full-bias-current81 and qcom,dac-disable-bias-current-tweak disabled,82 bias current is half.83 type: boolean84 85 qcom,dac-full-bias-current:86 description:87 Set Analog MDI driver bias current to FULL.88 89 With this not defined, bias current is set to DSP.90 (bias current is adjusted based on cable length)91 92 Actual bias current might be different with93 qcom,dac-disable-bias-current-tweak disabled.94 type: boolean95 96 qcom,dac-disable-bias-current-tweak:97 description: |98 Set Analog MDI driver bias current to disable tweak99 to bias current.100 101 With this not defined, bias current tweak are enabled102 by default.103 104 With this enabled the following tweak are NOT applied:105 - With both FULL amplitude and FULL bias current: bias current106 is set to half.107 - With only DSP amplitude: bias current is set to half and108 is set to 1/4 with cable < 10m.109 - With DSP bias current (included both DSP amplitude and110 DSP bias current): bias current is half the detected current111 with cable < 10m.112 type: boolean113 114 gpio-controller: true115 116 '#gpio-cells':117 const: 2118 119 if:120 required:121 - gpio-controller122 then:123 properties:124 leds: false125 126 unevaluatedProperties: false127 128required:129 - compatible130 131unevaluatedProperties: false132 133examples:134 - |135 #include <dt-bindings/leds/common.h>136 137 mdio {138 #address-cells = <1>;139 #size-cells = <0>;140 141 ethernet-phy-package@0 {142 #address-cells = <1>;143 #size-cells = <0>;144 compatible = "qcom,qca8075-package";145 reg = <0>;146 147 qcom,package-mode = "qsgmii";148 149 ethernet-phy@0 {150 reg = <0>;151 152 leds {153 #address-cells = <1>;154 #size-cells = <0>;155 156 led@0 {157 reg = <0>;158 color = <LED_COLOR_ID_GREEN>;159 function = LED_FUNCTION_LAN;160 default-state = "keep";161 };162 };163 };164 165 ethernet-phy@1 {166 reg = <1>;167 };168 169 ethernet-phy@2 {170 reg = <2>;171 172 gpio-controller;173 #gpio-cells = <2>;174 };175 176 ethernet-phy@3 {177 reg = <3>;178 };179 180 ethernet-phy@4 {181 reg = <4>;182 };183 };184 };185