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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/net/renesas,ether.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Renesas Electronics SH EtherMAC8 9allOf:10 - $ref: ethernet-controller.yaml#11 12maintainers:13 - Sergei Shtylyov <sergei.shtylyov@gmail.com>14 15properties:16 compatible:17 oneOf:18 - items:19 - enum:20 - renesas,gether-r8a7740 # device is a part of R8A7740 SoC21 - renesas,gether-r8a77980 # device is a part of R8A77980 SoC22 - renesas,ether-r7s72100 # device is a part of R7S72100 SoC23 - renesas,ether-r7s9210 # device is a part of R7S9210 SoC24 - items:25 - enum:26 - renesas,ether-r8a7778 # device is a part of R8A7778 SoC27 - renesas,ether-r8a7779 # device is a part of R8A7779 SoC28 - enum:29 - renesas,rcar-gen1-ether # a generic R-Car Gen1 device30 - items:31 - enum:32 - renesas,ether-r8a7742 # device is a part of R8A7742 SoC33 - renesas,ether-r8a7743 # device is a part of R8A7743 SoC34 - renesas,ether-r8a7745 # device is a part of R8A7745 SoC35 - renesas,ether-r8a7790 # device is a part of R8A7790 SoC36 - renesas,ether-r8a7791 # device is a part of R8A7791 SoC37 - renesas,ether-r8a7793 # device is a part of R8A7793 SoC38 - renesas,ether-r8a7794 # device is a part of R8A7794 SoC39 - enum:40 - renesas,rcar-gen2-ether # a generic R-Car Gen2 or RZ/G1 device41 42 reg:43 items:44 - description: E-DMAC/feLic registers45 - description: TSU registers46 minItems: 147 48 interrupts:49 maxItems: 150 51 '#address-cells':52 description: number of address cells for the MDIO bus53 const: 154 55 '#size-cells':56 description: number of size cells on the MDIO bus57 const: 058 59 clocks:60 maxItems: 161 62 power-domains:63 maxItems: 164 65 resets:66 maxItems: 167 68 phy-mode: true69 70 phy-handle: true71 72 renesas,no-ether-link:73 type: boolean74 description:75 specify when a board does not provide a proper Ether LINK signal76 77 renesas,ether-link-active-low:78 type: boolean79 description:80 specify when the Ether LINK signal is active-low instead of normal81 active-high82 83patternProperties:84 "@[0-9a-f]$":85 type: object86 87required:88 - compatible89 - reg90 - interrupts91 - phy-mode92 - phy-handle93 - '#address-cells'94 - '#size-cells'95 - clocks96 97additionalProperties: false98 99examples:100 # Lager board101 - |102 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>103 #include <dt-bindings/interrupt-controller/arm-gic.h>104 #include <dt-bindings/power/r8a7790-sysc.h>105 #include <dt-bindings/gpio/gpio.h>106 107 ethernet@ee700000 {108 compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether";109 reg = <0xee700000 0x400>;110 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;111 clocks = <&cpg CPG_MOD 813>;112 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;113 resets = <&cpg 813>;114 phy-mode = "rmii";115 phy-handle = <&phy1>;116 renesas,ether-link-active-low;117 #address-cells = <1>;118 #size-cells = <0>;119 120 phy1: ethernet-phy@1 {121 compatible = "ethernet-phy-id0022.1537",122 "ethernet-phy-ieee802.3-c22";123 reg = <1>;124 interrupt-parent = <&irqc0>;125 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;126 micrel,led-mode = <1>;127 reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>;128 };129 };130