154 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module8 9maintainers:10 - Siddharth Vadapalli <s-vadapalli@ti.com>11 - Roger Quadros <rogerq@kernel.org>12 13description: |+14 The TI AM654x/J721E CPTS module is used to facilitate host control of time15 sync operations.16 Main features of CPTS module are17 - selection of multiple external clock sources18 - Software control of time sync events via interrupt or polling19 - 64-bit timestamp mode in ns with PPM and nudge adjustment.20 - hardware timestamp push inputs (HWx_TS_PUSH)21 - timestamp counter compare output (TS_COMP)22 - timestamp counter bit output (TS_SYNC)23 - periodic Generator function outputs (TS_GENFx)24 - Ethernet Enhanced Scheduled Traffic Operations (CPTS_ESTFn) (TSN)25 - external hardware timestamp push inputs (HWx_TS_PUSH) timestamping26 27 Depending on integration it enables compliance with the IEEE 1588-200828 standard for a precision clock synchronization protocol, Ethernet Enhanced29 Scheduled Traffic Operations (CPTS_ESTFn) and PCIe Subsystem Precision Time30 Measurement (PTM).31 32 TI AM654x/J721E SoCs has several similar CPTS modules integrated into the33 different parts of the system which could be synchronized with each other34 - Main CPTS35 - MCU CPSW CPTS with IEEE 1588-2008 support36 - PCIe subsystem CPTS for PTM support37 38 Depending on CPTS module integration and when CPTS is integral part of39 another module (MCU CPSW for example) "compatible" and "reg" can40 be omitted - parent module is fully responsible for CPTS enabling and41 configuration.42 43properties:44 $nodename:45 pattern: "^cpts@[0-9a-f]+$"46 47 compatible:48 enum:49 - ti,am65-cpts50 - ti,j721e-cpts51 52 reg:53 maxItems: 154 description:55 The physical base address and size of CPTS IO range56 57 reg-names:58 items:59 - const: cpts60 61 clocks:62 maxItems: 163 description: CPTS reference clock64 65 clock-names:66 items:67 - const: cpts68 69 interrupts:70 items:71 - description: CPTS events interrupt72 73 interrupt-names:74 items:75 - const: cpts76 77 assigned-clock-parents: true78 79 assigned-clocks: true80 81 power-domains:82 maxItems: 183 84 ti,cpts-ext-ts-inputs:85 $ref: /schemas/types.yaml#/definitions/uint3286 maximum: 887 description:88 Number of hardware timestamp push inputs (HWx_TS_PUSH)89 90 ti,cpts-periodic-outputs:91 $ref: /schemas/types.yaml#/definitions/uint3292 maximum: 893 description:94 Number of timestamp Generator function outputs (TS_GENFx)95 96 ti,pps:97 $ref: /schemas/types.yaml#/definitions/uint32-array98 minItems: 299 maxItems: 2100 description: |101 The pair of HWx_TS_PUSH input and TS_GENFy output indexes used for102 PPS events generation. Platform/board specific.103 104 refclk-mux:105 type: object106 additionalProperties: false107 description: CPTS reference clock multiplexer clock108 properties:109 '#clock-cells':110 const: 0111 112 clocks:113 maxItems: 8114 115 required:116 - clocks117 118required:119 - compatible120 - reg121 - clocks122 - clock-names123 - interrupts124 - interrupt-names125 126additionalProperties: false127 128examples:129 - |130 #include <dt-bindings/interrupt-controller/irq.h>131 #include <dt-bindings/interrupt-controller/arm-gic.h>132 133 cpts@310d0000 {134 compatible = "ti,am65-cpts";135 reg = <0x310d0000 0x400>;136 reg-names = "cpts";137 clocks = <&main_cpts_mux>;138 clock-names = "cpts";139 interrupts-extended = <&k3_irq 163 0 IRQ_TYPE_LEVEL_HIGH>;140 interrupt-names = "cpts";141 ti,cpts-periodic-outputs = <6>;142 ti,cpts-ext-ts-inputs = <8>;143 144 main_cpts_mux: refclk-mux {145 #clock-cells = <0>;146 clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,147 <&k3_clks 157 91>, <&k3_clks 157 77>,148 <&k3_clks 157 102>, <&k3_clks 157 80>,149 <&k3_clks 120 3>, <&k3_clks 121 3>;150 assigned-clocks = <&main_cpts_mux>;151 assigned-clock-parents = <&k3_clks 118 11>;152 };153 };154