90 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Freescale i.MX On-Chip OTP Controller (OCOTP)8 9maintainers:10 - Shawn Guo <shawnguo@kernel.org>11 - Sascha Hauer <s.hauer@pengutronix.de>12 - Fabio Estevam <festevam@gmail.com>13 14description: |15 This binding represents the on-chip eFuse OTP controller found on16 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93/5 SoCs.18 19allOf:20 - $ref: nvmem.yaml#21 - $ref: nvmem-deprecated-cells.yaml#22 23properties:24 compatible:25 oneOf:26 - items:27 - enum:28 - fsl,imx6q-ocotp29 - fsl,imx6sl-ocotp30 - fsl,imx6sx-ocotp31 - fsl,imx6ul-ocotp32 - fsl,imx6ull-ocotp33 - fsl,imx7d-ocotp34 - fsl,imx6sll-ocotp35 - fsl,imx7ulp-ocotp36 - fsl,imx8mq-ocotp37 - fsl,imx8mm-ocotp38 - fsl,imx93-ocotp39 - fsl,imx95-ocotp40 - const: syscon41 - items:42 - enum:43 - fsl,imx8mn-ocotp44 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however45 # the code for getting SoC revision depends on fsl,imx8mm-ocotp46 # compatible.47 - fsl,imx8mp-ocotp48 - const: fsl,imx8mm-ocotp49 - const: syscon50 51 reg:52 maxItems: 153 54 clocks:55 maxItems: 156 57required:58 - "#address-cells"59 - "#size-cells"60 - compatible61 - reg62 63unevaluatedProperties: false64 65examples:66 - |67 #include <dt-bindings/clock/imx6sx-clock.h>68 69 ocotp: efuse@21bc000 {70 #address-cells = <1>;71 #size-cells = <1>;72 compatible = "fsl,imx6sx-ocotp", "syscon";73 reg = <0x021bc000 0x4000>;74 clocks = <&clks IMX6SX_CLK_OCOTP>;75 76 cpu_speed_grade: speed-grade@10 {77 reg = <0x10 4>;78 };79 80 tempmon_calib: calib@38 {81 reg = <0x38 4>;82 };83 84 tempmon_temp_grade: temp-grade@20 {85 reg = <0x20 4>;86 };87 };88 89...90