670 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm PCI express root complex8 9maintainers:10 - Bjorn Andersson <bjorn.andersson@linaro.org>11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>12 13description: |14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare15 PCIe IP.16 17properties:18 compatible:19 oneOf:20 - enum:21 - qcom,pcie-apq806422 - qcom,pcie-apq808423 - qcom,pcie-ipq401924 - qcom,pcie-ipq601825 - qcom,pcie-ipq806426 - qcom,pcie-ipq8064-v227 - qcom,pcie-ipq807428 - qcom,pcie-ipq8074-gen329 - qcom,pcie-msm899630 - qcom,pcie-qcs40431 - qcom,pcie-sdm84532 - qcom,pcie-sdx5533 - items:34 - const: qcom,pcie-msm899835 - const: qcom,pcie-msm899636 37 reg:38 minItems: 439 maxItems: 640 41 reg-names:42 minItems: 443 maxItems: 644 45 interrupts:46 minItems: 147 maxItems: 848 49 interrupt-names:50 minItems: 151 maxItems: 852 53 iommu-map:54 minItems: 155 maxItems: 1656 57 # Common definitions for clocks, clock-names and reset.58 # Platform constraints are described later.59 clocks:60 minItems: 361 maxItems: 1362 63 clock-names:64 minItems: 365 maxItems: 1366 67 dma-coherent: true68 69 interconnects:70 maxItems: 271 72 interconnect-names:73 items:74 - const: pcie-mem75 - const: cpu-pcie76 77 resets:78 minItems: 179 maxItems: 1280 81 reset-names:82 minItems: 183 maxItems: 1284 85 vdda-supply:86 description: A phandle to the core analog power supply87 88 vdda_phy-supply:89 description: A phandle to the core analog power supply for PHY90 91 vdda_refclk-supply:92 description: A phandle to the core analog power supply for IC which generates reference clock93 94 vddpe-3v3-supply:95 description: A phandle to the PCIe endpoint power supply96 97 phys:98 maxItems: 199 100 phy-names:101 items:102 - const: pciephy103 104 power-domains:105 maxItems: 1106 107 perst-gpios:108 description: GPIO controlled connection to PERST# signal109 maxItems: 1110 111 required-opps:112 maxItems: 1113 114 wake-gpios:115 description: GPIO controlled connection to WAKE# signal116 maxItems: 1117 118required:119 - compatible120 - reg121 - reg-names122 - interrupt-map-mask123 - interrupt-map124 - clocks125 - clock-names126 127anyOf:128 - required:129 - interrupts130 - interrupt-names131 - "#interrupt-cells"132 - required:133 - msi-map134 135allOf:136 - $ref: /schemas/pci/pci-host-bridge.yaml#137 - if:138 properties:139 compatible:140 contains:141 enum:142 - qcom,pcie-apq8064143 - qcom,pcie-ipq4019144 - qcom,pcie-ipq8064145 - qcom,pcie-ipq8064v2146 - qcom,pcie-ipq8074147 - qcom,pcie-qcs404148 then:149 properties:150 reg:151 minItems: 4152 maxItems: 4153 reg-names:154 items:155 - const: dbi # DesignWare PCIe registers156 - const: elbi # External local bus interface registers157 - const: parf # Qualcomm specific registers158 - const: config # PCIe configuration space159 160 - if:161 properties:162 compatible:163 contains:164 enum:165 - qcom,pcie-ipq6018166 - qcom,pcie-ipq8074-gen3167 then:168 properties:169 reg:170 minItems: 5171 maxItems: 5172 reg-names:173 items:174 - const: dbi # DesignWare PCIe registers175 - const: elbi # External local bus interface registers176 - const: atu # ATU address space177 - const: parf # Qualcomm specific registers178 - const: config # PCIe configuration space179 180 - if:181 properties:182 compatible:183 contains:184 enum:185 - qcom,pcie-apq8084186 - qcom,pcie-msm8996187 - qcom,pcie-sdm845188 then:189 properties:190 reg:191 minItems: 4192 maxItems: 5193 reg-names:194 minItems: 4195 items:196 - const: parf # Qualcomm specific registers197 - const: dbi # DesignWare PCIe registers198 - const: elbi # External local bus interface registers199 - const: config # PCIe configuration space200 - const: mhi # MHI registers201 202 - if:203 properties:204 compatible:205 contains:206 enum:207 - qcom,pcie-sdx55208 then:209 properties:210 reg:211 minItems: 5212 maxItems: 6213 reg-names:214 minItems: 5215 items:216 - const: parf # Qualcomm specific registers217 - const: dbi # DesignWare PCIe registers218 - const: elbi # External local bus interface registers219 - const: atu # ATU address space220 - const: config # PCIe configuration space221 - const: mhi # MHI registers222 223 - if:224 properties:225 compatible:226 contains:227 enum:228 - qcom,pcie-apq8064229 - qcom,pcie-ipq8064230 - qcom,pcie-ipq8064v2231 then:232 properties:233 clocks:234 minItems: 3235 maxItems: 5236 clock-names:237 minItems: 3238 items:239 - const: core # Clocks the pcie hw block240 - const: iface # Configuration AHB clock241 - const: phy # Clocks the pcie PHY block242 - const: aux # Clocks the pcie AUX block, not on apq8064243 - const: ref # Clocks the pcie ref block, not on apq8064244 resets:245 minItems: 5246 maxItems: 6247 reset-names:248 minItems: 5249 items:250 - const: axi # AXI reset251 - const: ahb # AHB reset252 - const: por # POR reset253 - const: pci # PCI reset254 - const: phy # PHY reset255 - const: ext # EXT reset, not on apq8064256 required:257 - vdda-supply258 - vdda_phy-supply259 - vdda_refclk-supply260 261 - if:262 properties:263 compatible:264 contains:265 enum:266 - qcom,pcie-apq8084267 then:268 properties:269 clocks:270 minItems: 4271 maxItems: 4272 clock-names:273 items:274 - const: iface # Configuration AHB clock275 - const: master_bus # Master AXI clock276 - const: slave_bus # Slave AXI clock277 - const: aux # Auxiliary (AUX) clock278 resets:279 maxItems: 1280 reset-names:281 items:282 - const: core # Core reset283 284 - if:285 properties:286 compatible:287 contains:288 enum:289 - qcom,pcie-ipq4019290 then:291 properties:292 clocks:293 minItems: 3294 maxItems: 3295 clock-names:296 items:297 - const: aux # Auxiliary (AUX) clock298 - const: master_bus # Master AXI clock299 - const: slave_bus # Slave AXI clock300 resets:301 minItems: 12302 maxItems: 12303 reset-names:304 items:305 - const: axi_m # AXI master reset306 - const: axi_s # AXI slave reset307 - const: pipe # PIPE reset308 - const: axi_m_vmid # VMID reset309 - const: axi_s_xpu # XPU reset310 - const: parf # PARF reset311 - const: phy # PHY reset312 - const: axi_m_sticky # AXI sticky reset313 - const: pipe_sticky # PIPE sticky reset314 - const: pwr # PWR reset315 - const: ahb # AHB reset316 - const: phy_ahb # PHY AHB reset317 318 - if:319 properties:320 compatible:321 contains:322 enum:323 - qcom,pcie-msm8996324 then:325 properties:326 clocks:327 minItems: 5328 maxItems: 5329 clock-names:330 items:331 - const: pipe # Pipe Clock driving internal logic332 - const: aux # Auxiliary (AUX) clock333 - const: cfg # Configuration clock334 - const: bus_master # Master AXI clock335 - const: bus_slave # Slave AXI clock336 resets: false337 reset-names: false338 339 - if:340 properties:341 compatible:342 contains:343 enum:344 - qcom,pcie-ipq8074345 then:346 properties:347 clocks:348 minItems: 5349 maxItems: 5350 clock-names:351 items:352 - const: iface # PCIe to SysNOC BIU clock353 - const: axi_m # AXI Master clock354 - const: axi_s # AXI Slave clock355 - const: ahb # AHB clock356 - const: aux # Auxiliary clock357 resets:358 minItems: 7359 maxItems: 7360 reset-names:361 items:362 - const: pipe # PIPE reset363 - const: sleep # Sleep reset364 - const: sticky # Core Sticky reset365 - const: axi_m # AXI Master reset366 - const: axi_s # AXI Slave reset367 - const: ahb # AHB Reset368 - const: axi_m_sticky # AXI Master Sticky reset369 370 - if:371 properties:372 compatible:373 contains:374 enum:375 - qcom,pcie-ipq6018376 - qcom,pcie-ipq8074-gen3377 then:378 properties:379 clocks:380 minItems: 5381 maxItems: 5382 clock-names:383 items:384 - const: iface # PCIe to SysNOC BIU clock385 - const: axi_m # AXI Master clock386 - const: axi_s # AXI Slave clock387 - const: axi_bridge # AXI bridge clock388 - const: rchng389 resets:390 minItems: 8391 maxItems: 8392 reset-names:393 items:394 - const: pipe # PIPE reset395 - const: sleep # Sleep reset396 - const: sticky # Core Sticky reset397 - const: axi_m # AXI Master reset398 - const: axi_s # AXI Slave reset399 - const: ahb # AHB Reset400 - const: axi_m_sticky # AXI Master Sticky reset401 - const: axi_s_sticky # AXI Slave Sticky reset402 403 - if:404 properties:405 compatible:406 contains:407 enum:408 - qcom,pcie-qcs404409 then:410 properties:411 clocks:412 minItems: 4413 maxItems: 4414 clock-names:415 items:416 - const: iface # AHB clock417 - const: aux # Auxiliary clock418 - const: master_bus # AXI Master clock419 - const: slave_bus # AXI Slave clock420 resets:421 minItems: 6422 maxItems: 6423 reset-names:424 items:425 - const: axi_m # AXI Master reset426 - const: axi_s # AXI Slave reset427 - const: axi_m_sticky # AXI Master Sticky reset428 - const: pipe_sticky # PIPE sticky reset429 - const: pwr # PWR reset430 - const: ahb # AHB reset431 432 - if:433 properties:434 compatible:435 contains:436 enum:437 - qcom,pcie-sdm845438 then:439 oneOf:440 # Unfortunately the "optional" ref clock is used in the middle of the list441 - properties:442 clocks:443 minItems: 8444 maxItems: 8445 clock-names:446 items:447 - const: pipe # PIPE clock448 - const: aux # Auxiliary clock449 - const: cfg # Configuration clock450 - const: bus_master # Master AXI clock451 - const: bus_slave # Slave AXI clock452 - const: slave_q2a # Slave Q2A clock453 - const: ref # REFERENCE clock454 - const: tbu # PCIe TBU clock455 - properties:456 clocks:457 minItems: 7458 maxItems: 7459 clock-names:460 items:461 - const: pipe # PIPE clock462 - const: aux # Auxiliary clock463 - const: cfg # Configuration clock464 - const: bus_master # Master AXI clock465 - const: bus_slave # Slave AXI clock466 - const: slave_q2a # Slave Q2A clock467 - const: tbu # PCIe TBU clock468 properties:469 resets:470 maxItems: 1471 reset-names:472 items:473 - const: pci # PCIe core reset474 475 - if:476 properties:477 compatible:478 contains:479 enum:480 - qcom,pcie-sdx55481 then:482 properties:483 clocks:484 minItems: 7485 maxItems: 7486 clock-names:487 items:488 - const: pipe # PIPE clock489 - const: aux # Auxiliary clock490 - const: cfg # Configuration clock491 - const: bus_master # Master AXI clock492 - const: bus_slave # Slave AXI clock493 - const: slave_q2a # Slave Q2A clock494 - const: sleep # PCIe Sleep clock495 resets:496 maxItems: 1497 reset-names:498 items:499 - const: pci # PCIe core reset500 501 - if:502 not:503 properties:504 compatible:505 contains:506 enum:507 - qcom,pcie-apq8064508 - qcom,pcie-ipq4019509 - qcom,pcie-ipq8064510 - qcom,pcie-ipq8064v2511 - qcom,pcie-ipq8074512 - qcom,pcie-ipq8074-gen3513 - qcom,pcie-qcs404514 then:515 required:516 - power-domains517 518 - if:519 not:520 properties:521 compatible:522 contains:523 enum:524 - qcom,pcie-msm8996525 then:526 required:527 - resets528 - reset-names529 530 - if:531 properties:532 compatible:533 contains:534 enum:535 - qcom,pcie-msm8996536 - qcom,pcie-sdm845537 then:538 oneOf:539 - properties:540 interrupts:541 maxItems: 1542 interrupt-names:543 items:544 - const: msi545 - properties:546 interrupts:547 minItems: 8548 interrupt-names:549 items:550 - const: msi0551 - const: msi1552 - const: msi2553 - const: msi3554 - const: msi4555 - const: msi5556 - const: msi6557 - const: msi7558 559 - if:560 properties:561 compatible:562 contains:563 enum:564 - qcom,pcie-apq8064565 - qcom,pcie-apq8084566 - qcom,pcie-ipq4019567 - qcom,pcie-ipq6018568 - qcom,pcie-ipq8064569 - qcom,pcie-ipq8064-v2570 - qcom,pcie-ipq8074571 - qcom,pcie-ipq8074-gen3572 - qcom,pcie-qcs404573 then:574 properties:575 interrupts:576 maxItems: 1577 interrupt-names:578 items:579 - const: msi580 581unevaluatedProperties: false582 583examples:584 - |585 #include <dt-bindings/interrupt-controller/arm-gic.h>586 pcie@1b500000 {587 compatible = "qcom,pcie-ipq8064";588 reg = <0x1b500000 0x1000>,589 <0x1b502000 0x80>,590 <0x1b600000 0x100>,591 <0x0ff00000 0x100000>;592 reg-names = "dbi", "elbi", "parf", "config";593 device_type = "pci";594 linux,pci-domain = <0>;595 bus-range = <0x00 0xff>;596 num-lanes = <1>;597 #address-cells = <3>;598 #size-cells = <2>;599 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,600 <0x82000000 0 0 0x08000000 0 0x07e00000>;601 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;602 interrupt-names = "msi";603 #interrupt-cells = <1>;604 interrupt-map-mask = <0 0 0 0x7>;605 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,606 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,607 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,608 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;609 clocks = <&gcc 41>,610 <&gcc 43>,611 <&gcc 44>,612 <&gcc 42>,613 <&gcc 248>;614 clock-names = "core", "iface", "phy", "aux", "ref";615 resets = <&gcc 27>,616 <&gcc 26>,617 <&gcc 25>,618 <&gcc 24>,619 <&gcc 23>,620 <&gcc 22>;621 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";622 pinctrl-0 = <&pcie_pins_default>;623 pinctrl-names = "default";624 vdda-supply = <&pm8921_s3>;625 vdda_phy-supply = <&pm8921_lvs6>;626 vdda_refclk-supply = <&ext_3p3v>;627 };628 - |629 #include <dt-bindings/interrupt-controller/arm-gic.h>630 #include <dt-bindings/gpio/gpio.h>631 pcie@fc520000 {632 compatible = "qcom,pcie-apq8084";633 reg = <0xfc520000 0x2000>,634 <0xff000000 0x1000>,635 <0xff001000 0x1000>,636 <0xff002000 0x2000>;637 reg-names = "parf", "dbi", "elbi", "config";638 device_type = "pci";639 linux,pci-domain = <0>;640 bus-range = <0x00 0xff>;641 num-lanes = <1>;642 #address-cells = <3>;643 #size-cells = <2>;644 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>,645 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>;646 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;647 interrupt-names = "msi";648 #interrupt-cells = <1>;649 interrupt-map-mask = <0 0 0 0x7>;650 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,651 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,652 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,653 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;654 clocks = <&gcc 324>,655 <&gcc 325>,656 <&gcc 327>,657 <&gcc 323>;658 clock-names = "iface", "master_bus", "slave_bus", "aux";659 resets = <&gcc 81>;660 reset-names = "core";661 power-domains = <&gcc 1>;662 vdda-supply = <&pma8084_l3>;663 phys = <&pciephy0>;664 phy-names = "pciephy";665 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;666 pinctrl-0 = <&pcie0_pins_default>;667 pinctrl-names = "default";668 };669...670