188 lines · plain
1* Mediatek/Ralink RT3883 PCI controller2 31) Main node4 5 Required properties:6 7 - compatible: must be "ralink,rt3883-pci"8 9 - reg: specifies the physical base address of the controller and10 the length of the memory mapped region.11 12 - #address-cells: specifies the number of cells needed to encode an13 address. The value must be 1.14 15 - #size-cells: specifies the number of cells used to represent the size16 of an address. The value must be 1.17 18 - ranges: specifies the translation between child address space and parent19 address space20 21 Optional properties:22 23 - status: indicates the operational status of the device.24 Value must be either "disabled" or "okay".25 262) Child nodes27 28 The main node must have two child nodes which describes the built-in29 interrupt controller and the PCI host bridge.30 31 a) Interrupt controller:32 33 Required properties:34 35 - interrupt-controller: identifies the node as an interrupt controller36 37 - #address-cells: specifies the number of cells needed to encode an38 address. The value must be 0. As such, 'interrupt-map' nodes do not39 have to specify a parent unit address.40 41 - #interrupt-cells: specifies the number of cells needed to encode an42 interrupt source. The value must be 1.43 44 - interrupts: specifies the interrupt source of the parent interrupt45 controller. The format of the interrupt specifier depends on the46 parent interrupt controller.47 48 b) PCI host bridge:49 50 Required properties:51 52 - #address-cells: specifies the number of cells needed to encode an53 address. The value must be 0.54 55 - #size-cells: specifies the number of cells used to represent the size56 of an address. The value must be 2.57 58 - #interrupt-cells: specifies the number of cells needed to encode an59 interrupt source. The value must be 1.60 61 - device_type: must be "pci"62 63 - bus-range: PCI bus numbers covered64 65 - ranges: specifies the ranges for the PCI memory and I/O regions66 67 - interrupt-map-mask,68 - interrupt-map: standard PCI properties to define the mapping of the69 PCI interface to interrupt numbers.70 71 The PCI host bridge node might have additional sub-nodes representing72 the onboard PCI devices/PCI slots. Each such sub-node must have the73 following mandatory properties:74 75 - reg: used only for interrupt mapping, so only the first four bytes76 are used to refer to the correct bus number and device number.77 78 - device_type: must be "pci"79 80 If a given sub-node represents a PCI bridge it must have following81 mandatory properties as well:82 83 - #address-cells: must be set to <3>84 85 - #size-cells: must set to <2>86 87 - #interrupt-cells: must be set to <1>88 89 - interrupt-map-mask,90 - interrupt-map: standard PCI properties to define the mapping of the91 PCI interface to interrupt numbers.92 93 Besides the required properties the sub-nodes may have these optional94 properties:95 96 - status: indicates the operational status of the sub-node.97 Value must be either "disabled" or "okay".98 993) Example:100 101 a) SoC specific dtsi file:102 103 pci@10140000 {104 compatible = "ralink,rt3883-pci";105 reg = <0x10140000 0x20000>;106 #address-cells = <1>;107 #size-cells = <1>;108 ranges; /* direct mapping */109 110 status = "disabled";111 112 pciintc: interrupt-controller {113 interrupt-controller;114 #address-cells = <0>;115 #interrupt-cells = <1>;116 117 interrupt-parent = <&cpuintc>;118 interrupts = <4>;119 };120 121 host-bridge {122 #address-cells = <3>;123 #size-cells = <2>;124 #interrupt-cells = <1>;125 126 device_type = "pci";127 128 bus-range = <0 255>;129 ranges = <130 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */131 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */132 >;133 134 interrupt-map-mask = <0xf800 0 0 7>;135 interrupt-map = <136 /* IDSEL 17 */137 0x8800 0 0 1 &pciintc 18138 0x8800 0 0 2 &pciintc 18139 0x8800 0 0 3 &pciintc 18140 0x8800 0 0 4 &pciintc 18141 /* IDSEL 18 */142 0x9000 0 0 1 &pciintc 19143 0x9000 0 0 2 &pciintc 19144 0x9000 0 0 3 &pciintc 19145 0x9000 0 0 4 &pciintc 19146 >;147 148 pci-bridge@1 {149 reg = <0x0800 0 0 0 0>;150 device_type = "pci";151 #interrupt-cells = <1>;152 #address-cells = <3>;153 #size-cells = <2>;154 155 interrupt-map-mask = <0x0 0 0 0>;156 interrupt-map = <0x0 0 0 0 &pciintc 20>;157 158 status = "disabled";159 };160 161 pci-slot@17 {162 reg = <0x8800 0 0 0 0>;163 device_type = "pci";164 165 status = "disabled";166 };167 168 pci-slot@18 {169 reg = <0x9000 0 0 0 0>;170 device_type = "pci";171 172 status = "disabled";173 };174 };175 };176 177 b) Board specific dts file:178 179 pci@10140000 {180 status = "okay";181 182 host-bridge {183 pci-bridge@1 {184 status = "okay";185 };186 };187 };188