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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: DesignWare based PCIe RC/EP controller on Rockchip SoCs8 9maintainers:10 - Shawn Lin <shawn.lin@rock-chips.com>11 - Simon Xue <xxm@rock-chips.com>12 - Heiko Stuebner <heiko@sntech.de>13 14description: |+15 Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip16 SoCs.17 18properties:19 clocks:20 minItems: 521 items:22 - description: AHB clock for PCIe master23 - description: AHB clock for PCIe slave24 - description: AHB clock for PCIe dbi25 - description: APB clock for PCIe26 - description: Auxiliary clock for PCIe27 - description: PIPE clock28 - description: Reference clock for PCIe29 30 clock-names:31 minItems: 532 items:33 - const: aclk_mst34 - const: aclk_slv35 - const: aclk_dbi36 - const: pclk37 - const: aux38 - const: pipe39 - const: ref40 41 interrupts:42 minItems: 543 items:44 - description:45 Combined system interrupt, which is used to signal the following46 interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,47 hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,48 edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app49 - description:50 Combined PM interrupt, which is used to signal the following51 interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,52 linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,53 linkst_out_l0s, pm_dstate_update54 - description:55 Combined message interrupt, which is used to signal the following56 interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,57 pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active58 - description:59 Combined legacy interrupt, which is used to signal the following60 interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc,61 tx_intd62 - description:63 Combined error interrupt, which is used to signal the following64 interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,65 tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,66 nf_err_rx, f_err_rx, radm_qoverflow67 - description:68 eDMA write channel 0 interrupt69 - description:70 eDMA write channel 1 interrupt71 - description:72 eDMA read channel 0 interrupt73 - description:74 eDMA read channel 1 interrupt75 76 interrupt-names:77 minItems: 578 items:79 - const: sys80 - const: pmc81 - const: msg82 - const: legacy83 - const: err84 - const: dma085 - const: dma186 - const: dma287 - const: dma388 89 num-lanes: true90 91 phys:92 maxItems: 193 94 phy-names:95 const: pcie-phy96 97 power-domains:98 maxItems: 199 100 resets:101 minItems: 1102 maxItems: 2103 104 reset-names:105 oneOf:106 - const: pipe107 - items:108 - const: pwr109 - const: pipe110 111required:112 - compatible113 - reg114 - reg-names115 - clocks116 - clock-names117 - num-lanes118 - phys119 - phy-names120 - power-domains121 - resets122 - reset-names123 124additionalProperties: true125 126...127