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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2# Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/3%YAML 1.24---5$id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: TI AM65 PCI Endpoint9 10maintainers:11 - Kishon Vijay Abraham I <kishon@ti.com>12 13allOf:14 - $ref: pci-ep.yaml#15 16properties:17 compatible:18 enum:19 - ti,am654-pcie-ep20 21 reg:22 maxItems: 423 24 reg-names:25 items:26 - const: app27 - const: dbics28 - const: addr_space29 - const: atu30 31 power-domains:32 maxItems: 133 34 ti,syscon-pcie-mode:35 $ref: /schemas/types.yaml#/definitions/phandle-array36 items:37 - items:38 - description: Phandle to the SYSCON entry39 - description: pcie_ctrl register offset within SYSCON40 description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.41 42 interrupts:43 minItems: 144 45 dma-coherent: true46 47required:48 - compatible49 - reg50 - reg-names51 - max-link-speed52 - power-domains53 - ti,syscon-pcie-mode54 - dma-coherent55 56unevaluatedProperties: false57 58examples:59 - |60 #include <dt-bindings/interrupt-controller/arm-gic.h>61 #include <dt-bindings/interrupt-controller/irq.h>62 #include <dt-bindings/soc/ti,sci_pm_domain.h>63 64 pcie0_ep: pcie-ep@5500000 {65 compatible = "ti,am654-pcie-ep";66 reg = <0x5500000 0x1000>,67 <0x5501000 0x1000>,68 <0x10000000 0x8000000>,69 <0x5506000 0x1000>;70 reg-names = "app", "dbics", "addr_space", "atu";71 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;72 ti,syscon-pcie-mode = <&scm_conf 0x4060>;73 max-link-speed = <2>;74 dma-coherent;75 interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;76 };77