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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Freescale(NXP) IMX8/9 DDR performance monitor8 9maintainers:10 - Frank Li <frank.li@nxp.com>11 12properties:13 compatible:14 oneOf:15 - enum:16 - fsl,imx8-ddr-pmu17 - fsl,imx8m-ddr-pmu18 - fsl,imx8mq-ddr-pmu19 - fsl,imx8mm-ddr-pmu20 - fsl,imx8mn-ddr-pmu21 - fsl,imx8mp-ddr-pmu22 - fsl,imx93-ddr-pmu23 - items:24 - enum:25 - fsl,imx8mm-ddr-pmu26 - fsl,imx8mn-ddr-pmu27 - fsl,imx8mq-ddr-pmu28 - fsl,imx8mp-ddr-pmu29 - const: fsl,imx8m-ddr-pmu30 - items:31 - const: fsl,imx8dxl-ddr-pmu32 - const: fsl,imx8-ddr-pmu33 - items:34 - const: fsl,imx95-ddr-pmu35 - const: fsl,imx93-ddr-pmu36 37 reg:38 maxItems: 139 40 interrupts:41 maxItems: 142 43required:44 - compatible45 - reg46 - interrupts47 48additionalProperties: false49 50examples:51 - |52 #include <dt-bindings/interrupt-controller/arm-gic.h>53 54 ddr-pmu@5c020000 {55 compatible = "fsl,imx8-ddr-pmu";56 reg = <0x5c020000 0x10000>;57 interrupt-parent = <&gic>;58 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;59 };60