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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/perf/starfive,jh8100-starlink-pmu.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: StarFive JH8100 StarLink PMU8 9maintainers:10 - Ji Sheng Teoh <jisheng.teoh@starfivetech.com>11 12description:13 StarFive's JH8100 StarLink PMU integrates one or more CPU cores with a14 shared L3 memory system. The PMU support overflow interrupt, up to15 16 programmable 64bit event counters, and an independent 64bit cycle16 counter. StarFive's JH8100 StarLink PMU is accessed via MMIO.17 18properties:19 compatible:20 const: starfive,jh8100-starlink-pmu21 22 reg:23 maxItems: 124 25 interrupts:26 maxItems: 127 28required:29 - compatible30 - reg31 - interrupts32 33additionalProperties: false34 35examples:36 - |37 soc {38 #address-cells = <2>;39 #size-cells = <2>;40 41 pmu@12900000 {42 compatible = "starfive,jh8100-starlink-pmu";43 reg = <0x0 0x12900000 0x0 0x10000>;44 interrupts = <34>;45 };46 };47