brintos

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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Allwinner A64 USB PHY8 9maintainers:10  - Chen-Yu Tsai <wens@csie.org>11  - Maxime Ripard <mripard@kernel.org>12 13properties:14  "#phy-cells":15    const: 116 17  compatible:18    enum:19      - allwinner,sun20i-d1-usb-phy20      - allwinner,sun50i-a64-usb-phy21 22  reg:23    items:24      - description: PHY Control registers25      - description: PHY PMU0 registers26      - description: PHY PMU1 registers27 28  reg-names:29    items:30      - const: phy_ctrl31      - const: pmu032      - const: pmu133 34  clocks:35    items:36      - description: USB OTG PHY bus clock37      - description: USB Host 0 PHY bus clock38 39  clock-names:40    items:41      - const: usb0_phy42      - const: usb1_phy43 44  resets:45    items:46      - description: USB OTG reset47      - description: USB Host 1 Controller reset48 49  reset-names:50    items:51      - const: usb0_reset52      - const: usb1_reset53 54  usb0_id_det-gpios:55    maxItems: 156    description: GPIO to the USB OTG ID pin57 58  usb0_vbus_det-gpios:59    maxItems: 160    description: GPIO to the USB OTG VBUS detect pin61 62  usb0_vbus_power-supply:63    description: Power supply to detect the USB OTG VBUS64 65  usb0_vbus-supply:66    description: Regulator controlling USB OTG VBUS67 68  usb1_vbus-supply:69    description: Regulator controlling USB1 Host controller70 71required:72  - "#phy-cells"73  - compatible74  - clocks75  - clock-names76  - reg77  - reg-names78  - resets79  - reset-names80 81additionalProperties: false82 83examples:84  - |85    #include <dt-bindings/gpio/gpio.h>86    #include <dt-bindings/clock/sun50i-a64-ccu.h>87    #include <dt-bindings/reset/sun50i-a64-ccu.h>88 89    phy@1c19400 {90        #phy-cells = <1>;91        compatible = "allwinner,sun50i-a64-usb-phy";92        reg = <0x01c19400 0x14>,93              <0x01c1a800 0x4>,94              <0x01c1b800 0x4>;95        reg-names = "phy_ctrl",96                    "pmu0",97                    "pmu1";98        clocks = <&ccu CLK_USB_PHY0>,99                 <&ccu CLK_USB_PHY1>;100        clock-names = "usb0_phy",101                      "usb1_phy";102        resets = <&ccu RST_USB_PHY0>,103                 <&ccu RST_USB_PHY1>;104        reset-names = "usb0_reset",105                      "usb1_reset";106        usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */107        usb0_vbus_power-supply = <&usb_power_supply>;108        usb0_vbus-supply = <&reg_drivevbus>;109        usb1_vbus-supply = <&reg_usb1_vbus>;110    };111