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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra186 XUSB pad controller8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13description: |14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential15 signals) which connect directly to pins/pads on the SoC package. Each lane16 is controlled by a HW block referred to as a "pad" in the Tegra hardware17 documentation. Each such "pad" may control either one or multiple lanes,18 and thus contains any logic common to all its lanes. Each lane can be19 separately configured and powered up.20 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or22 super-speed USB. Other lanes are for various types of low-speed, full-speed23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller24 contains a software-configurable mux that sits between the I/O controller25 ports (e.g. PCIe) and the lanes.26 27 In addition to per-lane configuration, USB 3.0 ports may require additional28 settings on a per-board basis.29 30 Pads will be represented as children of the top-level XUSB pad controller31 device tree node. Each lane exposed by the pad will be represented by its32 own subnode and can be referenced by users of the lane using the standard33 PHY bindings, as described by the phy-bindings.txt file in this directory.34 35 The Tegra hardware documentation refers to the connection between the XUSB36 pad controller and the XUSB controller as "ports". This is confusing since37 "port" is typically used to denote the physical USB receptacle. The device38 tree binding in this document uses the term "port" to refer to the logical39 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY40 for the USB signal, the VBUS power supply, the USB 2.0 companion port for41 USB 3.0 receptacles, ...).42 43properties:44 compatible:45 const: nvidia,tegra186-xusb-padctl46 47 reg:48 items:49 - description: pad controller registers50 - description: AO registers51 52 interrupts:53 items:54 - description: XUSB pad controller interrupt55 56 reg-names:57 items:58 - const: padctl59 - const: ao60 61 resets:62 items:63 - description: pad controller reset64 65 reset-names:66 items:67 - const: padctl68 69 avdd-pll-erefeut-supply:70 description: UPHY brick and reference clock as well as UTMI PHY71 power supply. Must supply 1.8 V.72 73 avdd-usb-supply:74 description: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must75 supply 3.3 V.76 77 vclamp-usb-supply:78 description: Bias rail for USB pad. Must supply 1.8 V.79 80 vddio-hsic-supply:81 description: HSIC PHY power supply. Must supply 1.2 V.82 83 pads:84 description: A required child node named "pads" contains a list of85 subnodes, one for each of the pads exposed by the XUSB pad controller.86 Each pad may need additional resources that can be referenced in its87 pad node.88 89 The "status" property is used to enable or disable the use of a pad.90 If set to "disabled", the pad will not be used on the given board. In91 order to use the pad and any of its lanes, this property must be set92 to "okay" or be absent.93 type: object94 additionalProperties: false95 properties:96 usb2:97 type: object98 additionalProperties: false99 properties:100 clocks:101 items:102 - description: USB2 tracking clock103 104 clock-names:105 items:106 - const: trk107 108 lanes:109 type: object110 additionalProperties: false111 properties:112 usb2-0:113 type: object114 additionalProperties: false115 properties:116 "#phy-cells":117 const: 0118 119 nvidia,function:120 description: Function selection for this lane.121 $ref: /schemas/types.yaml#/definitions/string122 enum: [ xusb ]123 124 usb2-1:125 type: object126 additionalProperties: false127 properties:128 "#phy-cells":129 const: 0130 131 nvidia,function:132 description: Function selection for this lane.133 $ref: /schemas/types.yaml#/definitions/string134 enum: [ xusb ]135 136 usb2-2:137 type: object138 additionalProperties: false139 properties:140 "#phy-cells":141 const: 0142 143 nvidia,function:144 description: Function selection for this lane.145 $ref: /schemas/types.yaml#/definitions/string146 enum: [ xusb ]147 148 hsic:149 type: object150 additionalProperties: false151 properties:152 clocks:153 items:154 - description: HSIC tracking clock155 156 clock-names:157 items:158 - const: trk159 160 lanes:161 type: object162 additionalProperties: false163 properties:164 hsic-0:165 type: object166 additionalProperties: false167 properties:168 "#phy-cells":169 const: 0170 171 nvidia,function:172 description: Function selection for this lane.173 $ref: /schemas/types.yaml#/definitions/string174 enum: [ xusb ]175 176 usb3:177 type: object178 additionalProperties: false179 properties:180 lanes:181 type: object182 additionalProperties: false183 properties:184 usb3-0:185 type: object186 additionalProperties: false187 properties:188 "#phy-cells":189 const: 0190 191 nvidia,function:192 description: Function selection for this lane.193 $ref: /schemas/types.yaml#/definitions/string194 enum: [ xusb ]195 196 usb3-1:197 type: object198 additionalProperties: false199 properties:200 "#phy-cells":201 const: 0202 203 nvidia,function:204 description: Function selection for this lane.205 $ref: /schemas/types.yaml#/definitions/string206 enum: [ xusb ]207 208 usb3-2:209 type: object210 additionalProperties: false211 properties:212 "#phy-cells":213 const: 0214 215 nvidia,function:216 description: Function selection for this lane.217 $ref: /schemas/types.yaml#/definitions/string218 enum: [ xusb ]219 220 ports:221 description: A required child node named "ports" contains a list of222 subnodes, one for each of the ports exposed by the XUSB pad controller.223 Each port may need additional resources that can be referenced in its224 port node.225 226 The "status" property is used to enable or disable the use of a port.227 If set to "disabled", the port will not be used on the given board. In228 order to use the port, this property must be set to "okay".229 type: object230 additionalProperties: false231 properties:232 usb2-0:233 type: object234 additionalProperties: false235 properties:236 # no need to further describe this because the connector will237 # match on gpio-usb-b-connector or usb-b-connector and cause238 # that binding to be selected for the subnode239 connector:240 type: object241 242 mode:243 description: A string that determines the mode in which to244 run the port.245 $ref: /schemas/types.yaml#/definitions/string246 enum: [ host, peripheral, otg ]247 248 nvidia,internal:249 description: A boolean property whose presence determines250 that a port is internal. In the absence of this property251 the port is considered to be external.252 $ref: /schemas/types.yaml#/definitions/flag253 254 usb-role-switch:255 description: |256 A boolean property whole presence indicates that the port257 supports OTG or peripheral mode. If present, the port258 supports switching between USB host and peripheral roles.259 A connector must be added as a subnode in that case.260 261 See ../connector/usb-connector.yaml.262 263 vbus-supply:264 description: A phandle to the regulator supplying the VBUS265 voltage.266 267 dependencies:268 usb-role-switch: [ connector ]269 270 usb2-1:271 type: object272 additionalProperties: false273 properties:274 # no need to further describe this because the connector will275 # match on gpio-usb-b-connector or usb-b-connector and cause276 # that binding to be selected for the subnode277 connector:278 type: object279 280 mode:281 description: A string that determines the mode in which to282 run the port.283 $ref: /schemas/types.yaml#/definitions/string284 enum: [ host, peripheral, otg ]285 286 nvidia,internal:287 description: A boolean property whose presence determines288 that a port is internal. In the absence of this property289 the port is considered to be external.290 $ref: /schemas/types.yaml#/definitions/flag291 292 usb-role-switch:293 description: |294 A boolean property whole presence indicates that the port295 supports OTG or peripheral mode. If present, the port296 supports switching between USB host and peripheral roles.297 A connector must be added as a subnode in that case.298 299 See ../connector/usb-connector.yaml.300 301 vbus-supply:302 description: A phandle to the regulator supplying the VBUS303 voltage.304 305 dependencies:306 usb-role-switch: [ connector ]307 308 usb2-2:309 type: object310 additionalProperties: false311 properties:312 # no need to further describe this because the connector will313 # match on gpio-usb-b-connector or usb-b-connector and cause314 # that binding to be selected for the subnode315 connector:316 type: object317 318 mode:319 description: A string that determines the mode in which to320 run the port.321 $ref: /schemas/types.yaml#/definitions/string322 enum: [ host, peripheral, otg ]323 324 nvidia,internal:325 description: A boolean property whose presence determines326 that a port is internal. In the absence of this property327 the port is considered to be external.328 $ref: /schemas/types.yaml#/definitions/flag329 330 usb-role-switch:331 description: |332 A boolean property whole presence indicates that the port333 supports OTG or peripheral mode. If present, the port334 supports switching between USB host and peripheral roles.335 A connector must be added as a subnode in that case.336 337 See ../connector/usb-connector.yaml.338 339 vbus-supply:340 description: A phandle to the regulator supplying the VBUS341 voltage.342 343 dependencies:344 usb-role-switch: [ connector ]345 346 hsic-0:347 type: object348 additionalProperties: false349 350 usb3-0:351 type: object352 additionalProperties: false353 properties:354 nvidia,internal:355 description: A boolean property whose presence determines356 that a port is internal. In the absence of this property357 the port is considered to be external.358 $ref: /schemas/types.yaml#/definitions/flag359 360 nvidia,usb2-companion:361 description: A single cell that specifies the physical port362 number to map this super-speed USB port to. The range of363 valid port numbers varies with the SoC generation.364 $ref: /schemas/types.yaml#/definitions/uint32365 enum: [ 0, 1, 2, 3 ]366 367 vbus-supply:368 description: A phandle to the regulator supplying the VBUS369 voltage.370 371 usb3-1:372 type: object373 additionalProperties: false374 properties:375 nvidia,internal:376 description: A boolean property whose presence determines377 that a port is internal. In the absence of this property378 the port is considered to be external.379 $ref: /schemas/types.yaml#/definitions/flag380 381 nvidia,usb2-companion:382 description: A single cell that specifies the physical port383 number to map this super-speed USB port to. The range of384 valid port numbers varies with the SoC generation.385 $ref: /schemas/types.yaml#/definitions/uint32386 enum: [ 0, 1, 2, 3 ]387 388 vbus-supply:389 description: A phandle to the regulator supplying the VBUS390 voltage.391 392 usb3-2:393 type: object394 additionalProperties: false395 properties:396 nvidia,internal:397 description: A boolean property whose presence determines398 that a port is internal. In the absence of this property399 the port is considered to be external.400 $ref: /schemas/types.yaml#/definitions/flag401 402 nvidia,usb2-companion:403 description: A single cell that specifies the physical port404 number to map this super-speed USB port to. The range of405 valid port numbers varies with the SoC generation.406 $ref: /schemas/types.yaml#/definitions/uint32407 enum: [ 0, 1, 2, 3 ]408 409 vbus-supply:410 description: A phandle to the regulator supplying the VBUS411 voltage.412 413additionalProperties: false414 415required:416 - compatible417 - reg418 - resets419 - reset-names420 - avdd-pll-erefeut-supply421 - avdd-usb-supply422 - vclamp-usb-supply423 - vddio-hsic-supply424 425examples:426 - |427 #include <dt-bindings/clock/tegra186-clock.h>428 #include <dt-bindings/gpio/tegra186-gpio.h>429 #include <dt-bindings/interrupt-controller/arm-gic.h>430 #include <dt-bindings/reset/tegra186-reset.h>431 432 padctl@3520000 {433 compatible = "nvidia,tegra186-xusb-padctl";434 reg = <0x03520000 0x1000>,435 <0x03540000 0x1000>;436 reg-names = "padctl", "ao";437 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;438 439 resets = <&bpmp TEGRA186_RESET_XUSB_PADCTL>;440 reset-names = "padctl";441 442 avdd-pll-erefeut-supply = <&vdd_1v8_pll>;443 avdd-usb-supply = <&vdd_3v3_sys>;444 vclamp-usb-supply = <&vdd_1v8>;445 vddio-hsic-supply = <&gnd>;446 447 pads {448 usb2 {449 clocks = <&bpmp TEGRA186_CLK_USB2_TRK>;450 clock-names = "trk";451 452 lanes {453 usb2-0 {454 nvidia,function = "xusb";455 #phy-cells = <0>;456 };457 458 usb2-1 {459 nvidia,function = "xusb";460 #phy-cells = <0>;461 };462 463 usb2-2 {464 nvidia,function = "xusb";465 #phy-cells = <0>;466 };467 };468 };469 470 hsic {471 clocks = <&bpmp TEGRA186_CLK_HSIC_TRK>;472 clock-names = "trk";473 status = "disabled";474 475 lanes {476 hsic-0 {477 status = "disabled";478 #phy-cells = <0>;479 };480 };481 };482 483 usb3 {484 lanes {485 usb3-0 {486 nvidia,function = "xusb";487 #phy-cells = <0>;488 };489 490 usb3-1 {491 nvidia,function = "xusb";492 #phy-cells = <0>;493 };494 495 usb3-2 {496 nvidia,function = "xusb";497 #phy-cells = <0>;498 };499 };500 };501 };502 503 ports {504 usb2-0 {505 mode = "otg";506 vbus-supply = <&vdd_usb0>;507 usb-role-switch;508 509 connector {510 compatible = "gpio-usb-b-connector",511 "usb-b-connector";512 label = "micro-USB";513 type = "micro";514 vbus-gpios = <&gpio TEGRA186_MAIN_GPIO(X, 7) GPIO_ACTIVE_LOW>;515 id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;516 };517 };518 519 usb2-1 {520 vbus-supply = <&vdd_usb1>;521 mode = "host";522 };523 524 usb2-2 {525 status = "disabled";526 };527 528 hsic-0 {529 status = "disabled";530 };531 532 usb3-0 {533 nvidia,usb2-companion = <1>;534 };535 536 usb3-1 {537 status = "disabled";538 };539 540 usb3-2 {541 status = "disabled";542 };543 };544 };545