44 lines · plain
1ROCKCHIP HDMI PHY WITH INNO IP BLOCK2 3Required properties:4 - compatible : should be one of the listed compatibles:5 * "rockchip,rk3228-hdmi-phy",6 * "rockchip,rk3328-hdmi-phy";7 - reg : Address and length of the hdmi phy control register set8 - clocks : phandle + clock specifier for the phy clocks9 - clock-names : string, clock name, must contain "sysclk" for system10 control and register configuration, "refoclk" for crystal-11 oscillator reference PLL clock input and "refpclk" for pclk-12 based refeference PLL clock input.13 - #clock-cells: should be 0.14 - clock-output-names : shall be the name for the output clock.15 - interrupts : phandle + interrupt specified for the hdmiphy interrupt16 - #phy-cells : must be 0. See ./phy-bindings.txt for details.17 18Optional properties for rk3328-hdmi-phy:19 - nvmem-cells = phandle + nvmem specifier for the cpu-version efuse20 - nvmem-cell-names : "cpu-version" to read the chip version, required21 for adjustment to some frequency settings22 23Example:24 hdmi_phy: hdmi-phy@12030000 {25 compatible = "rockchip,rk3228-hdmi-phy";26 reg = <0x12030000 0x10000>;27 #phy-cells = <0>;28 clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;29 clock-names = "sysclk", "refoclk", "refpclk";30 #clock-cells = <0>;31 clock-output-names = "hdmi_phy";32 status = "disabled";33 };34 35Then the PHY can be used in other nodes such as:36 37 hdmi: hdmi@200a0000 {38 compatible = "rockchip,rk3228-dw-hdmi";39 ...40 phys = <&hdmi_phy>;41 phy-names = "hdmi";42 ...43 };44