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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2 3%YAML 1.24---5$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Qualcomm eDP PHY9 10maintainers:11 - Bjorn Andersson <bjorn.andersson@linaro.org>12 13description:14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides15 the physical interface for Embedded Display Port.16 17properties:18 compatible:19 enum:20 - qcom,sc7280-edp-phy21 - qcom,sc8180x-edp-phy22 - qcom,sc8280xp-dp-phy23 - qcom,sc8280xp-edp-phy24 - qcom,x1e80100-dp-phy25 26 reg:27 items:28 - description: PHY base register block29 - description: tx0 register block30 - description: tx1 register block31 - description: PLL register block32 33 clocks:34 maxItems: 235 36 clock-names:37 items:38 - const: aux39 - const: cfg_ahb40 41 "#clock-cells":42 const: 143 44 "#phy-cells":45 const: 046 47 power-domains:48 maxItems: 149 50 vdda-phy-supply: true51 vdda-pll-supply: true52 53required:54 - compatible55 - reg56 - clocks57 - clock-names58 - "#clock-cells"59 - "#phy-cells"60 61additionalProperties: false62 63examples:64 - |65 phy@aec2a00 {66 compatible = "qcom,sc8180x-edp-phy";67 reg = <0x0aec2a00 0x1c0>,68 <0x0aec2200 0xa0>,69 <0x0aec2600 0xa0>,70 <0x0aec2000 0x19c>;71 72 clocks = <&dispcc 0>, <&dispcc 1>;73 clock-names = "aux", "cfg_ahb";74 75 #clock-cells = <1>;76 #phy-cells = <0>;77 78 vdda-phy-supply = <&vdd_a_edp_0_1p2>;79 vdda-pll-supply = <&vdd_a_edp_0_0p9>;80 };81...82