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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2# Copyright 2023 Realtek Semiconductor Corporation3%YAML 1.24---5$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Realtek DHC SoCs USB 2.0 PHY9 10maintainers:11 - Stanley Chang <stanley_chang@realtek.com>12 13description: |14 Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs.15 The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs16 support multiple XHCI controllers. One PHY device node maps to one XHCI17 controller.18 19 RTD1295/RTD1619 SoCs USB20 The USB architecture includes three XHCI controllers.21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some22 controllers.23 XHCI controller#0 -- usb2phy -- phy#024 |- usb3phy -- phy#025 XHCI controller#1 -- usb2phy -- phy#026 XHCI controller#2 -- usb2phy -- phy#027 |- usb3phy -- phy#028 29 RTD1395 SoCs USB30 The USB architecture includes two XHCI controllers.31 The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.032 PHY.33 XHCI controller#0 -- usb2phy -- phy#034 XHCI controller#1 -- usb2phy -- phy#035 |- phy#136 37 RTD1319/RTD1619b SoCs USB38 The USB architecture includes three XHCI controllers.39 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.40 XHCI controller#0 -- usb2phy -- phy#041 XHCI controller#1 -- usb2phy -- phy#042 XHCI controller#2 -- usb2phy -- phy#043 |- usb3phy -- phy#044 45 RTD1319d SoCs USB46 The USB architecture includes three XHCI controllers.47 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.48 XHCI controller#0 -- usb2phy -- phy#049 |- usb3phy -- phy#050 XHCI controller#1 -- usb2phy -- phy#051 XHCI controller#2 -- usb2phy -- phy#052 53 RTD1312c/RTD1315e SoCs USB54 The USB architecture includes three XHCI controllers.55 Each XHCI maps to one USB 2.0 PHY.56 XHCI controller#0 -- usb2phy -- phy#057 XHCI controller#1 -- usb2phy -- phy#058 XHCI controller#2 -- usb2phy -- phy#059 60properties:61 compatible:62 enum:63 - realtek,rtd1295-usb2phy64 - realtek,rtd1312c-usb2phy65 - realtek,rtd1315e-usb2phy66 - realtek,rtd1319-usb2phy67 - realtek,rtd1319d-usb2phy68 - realtek,rtd1395-usb2phy69 - realtek,rtd1395-usb2phy-2port70 - realtek,rtd1619-usb2phy71 - realtek,rtd1619b-usb2phy72 73 reg:74 items:75 - description: PHY data registers76 - description: PHY control registers77 78 "#phy-cells":79 const: 080 81 nvmem-cells:82 maxItems: 283 description:84 Phandles to nvmem cell that contains the trimming data.85 If unspecified, default value is used.86 87 nvmem-cell-names:88 items:89 - const: usb-dc-cal90 - const: usb-dc-dis91 description:92 The following names, which correspond to each nvmem-cells.93 usb-dc-cal is the driving level for each phy specified via efuse.94 usb-dc-dis is the disconnection level for each phy specified via efuse.95 96 realtek,inverse-hstx-sync-clock:97 description:98 For one of the phys of RTD1619b SoC, the synchronous clock of the99 high-speed tx must be inverted.100 type: boolean101 102 realtek,driving-level:103 description:104 Control the magnitude of High speed Dp/Dm output swing (mV).105 For a different board or port, the original magnitude maybe not meet106 the specification. In this situation we can adjust the value to meet107 the specification.108 $ref: /schemas/types.yaml#/definitions/uint32109 default: 8110 minimum: 0111 maximum: 31112 113 realtek,driving-level-compensate:114 description:115 For RTD1315e SoC, the driving level can be adjusted by reading the116 efuse table. This property provides drive compensation.117 If the magnitude of High speed Dp/Dm output swing still not meet the118 specification, then we can set this value to meet the specification.119 $ref: /schemas/types.yaml#/definitions/int32120 default: 0121 minimum: -8122 maximum: 8123 124 realtek,disconnection-compensate:125 description:126 This adjusts the disconnection level compensation for the different127 boards with different disconnection level.128 $ref: /schemas/types.yaml#/definitions/int32129 default: 0130 minimum: -8131 maximum: 8132 133required:134 - compatible135 - reg136 - "#phy-cells"137 138allOf:139 - if:140 not:141 properties:142 compatible:143 contains:144 enum:145 - realtek,rtd1619b-usb2phy146 then:147 properties:148 realtek,inverse-hstx-sync-clock: false149 150 - if:151 not:152 properties:153 compatible:154 contains:155 enum:156 - realtek,rtd1315e-usb2phy157 then:158 properties:159 realtek,driving-level-compensate: false160 161additionalProperties: false162 163examples:164 - |165 usb-phy@13214 {166 compatible = "realtek,rtd1619b-usb2phy";167 reg = <0x13214 0x4>, <0x28280 0x4>;168 #phy-cells = <0>;169 nvmem-cells = <&otp_usb_port0_dc_cal>, <&otp_usb_port0_dc_dis>;170 nvmem-cell-names = "usb-dc-cal", "usb-dc-dis";171 172 realtek,inverse-hstx-sync-clock;173 realtek,driving-level = <0xa>;174 realtek,disconnection-compensate = <(-1)>;175 };176