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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2# Copyright 2023 Realtek Semiconductor Corporation3%YAML 1.24---5$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Realtek DHC SoCs USB 3.0 PHY9 10maintainers:11 - Stanley Chang <stanley_chang@realtek.com>12 13description: |14 Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs.15 The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs16 support multiple XHCI controllers. One PHY device node maps to one XHCI17 controller.18 19 RTD1295/RTD1619 SoCs USB20 The USB architecture includes three XHCI controllers.21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some22 controllers.23 XHCI controller#0 -- usb2phy -- phy#024 |- usb3phy -- phy#025 XHCI controller#1 -- usb2phy -- phy#026 XHCI controller#2 -- usb2phy -- phy#027 |- usb3phy -- phy#028 29 RTD1319/RTD1619b SoCs USB30 The USB architecture includes three XHCI controllers.31 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.32 XHCI controller#0 -- usb2phy -- phy#033 XHCI controller#1 -- usb2phy -- phy#034 XHCI controller#2 -- usb2phy -- phy#035 |- usb3phy -- phy#036 37 RTD1319d SoCs USB38 The USB architecture includes three XHCI controllers.39 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.40 XHCI controller#0 -- usb2phy -- phy#041 |- usb3phy -- phy#042 XHCI controller#1 -- usb2phy -- phy#043 XHCI controller#2 -- usb2phy -- phy#044 45properties:46 compatible:47 enum:48 - realtek,rtd1295-usb3phy49 - realtek,rtd1319-usb3phy50 - realtek,rtd1319d-usb3phy51 - realtek,rtd1619-usb3phy52 - realtek,rtd1619b-usb3phy53 54 reg:55 maxItems: 156 57 "#phy-cells":58 const: 059 60 nvmem-cells:61 maxItems: 162 description: A phandle to the tx lfps swing trim data provided by63 a nvmem device, if unspecified, default values shall be used.64 65 nvmem-cell-names:66 items:67 - const: usb_u3_tx_lfps_swing_trim68 69 realtek,amplitude-control-coarse-tuning:70 description:71 This adjusts the signal amplitude for normal operation and beacon LFPS.72 This value is a parameter for coarse tuning.73 For different boards, if the default value is inappropriate, this74 property can be assigned to adjust.75 $ref: /schemas/types.yaml#/definitions/uint3276 default: 25577 minimum: 078 maximum: 25579 80 realtek,amplitude-control-fine-tuning:81 description:82 This adjusts the signal amplitude for normal operation and beacon LFPS.83 This value is used for fine-tuning parameters.84 $ref: /schemas/types.yaml#/definitions/uint3285 default: 6553586 minimum: 087 maximum: 6553588 89required:90 - compatible91 - reg92 - "#phy-cells"93 94additionalProperties: false95 96examples:97 - |98 usb-phy@13e10 {99 compatible = "realtek,rtd1319d-usb3phy";100 reg = <0x13e10 0x4>;101 #phy-cells = <0>;102 103 nvmem-cells = <&otp_usb_u3_tx_lfps_swing_trim>;104 nvmem-cell-names = "usb_u3_tx_lfps_swing_trim";105 106 realtek,amplitude-control-coarse-tuning = <0x77>;107 };108