72 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: StarFive SoC JH7110 MIPI D-PHY Rx Controller8 9maintainers:10 - Jack Zhu <jack.zhu@starfivetech.com>11 - Changhuang Liang <changhuang.liang@starfivetech.com>12 13description:14 StarFive SoCs contain a MIPI CSI D-PHY based on M31 IP, used to15 transfer CSI camera data.16 17properties:18 compatible:19 const: starfive,jh7110-dphy-rx20 21 reg:22 maxItems: 123 24 clocks:25 items:26 - description: config clock27 - description: reference clock28 - description: escape mode transmit clock29 30 clock-names:31 items:32 - const: cfg33 - const: ref34 - const: tx35 36 resets:37 items:38 - description: DPHY_HW reset39 - description: DPHY_B09_ALWAYS_ON reset40 41 power-domains:42 maxItems: 143 44 "#phy-cells":45 const: 046 47required:48 - compatible49 - reg50 - clocks51 - clock-names52 - resets53 - power-domains54 - "#phy-cells"55 56additionalProperties: false57 58examples:59 - |60 phy@19820000 {61 compatible = "starfive,jh7110-dphy-rx";62 reg = <0x19820000 0x10000>;63 clocks = <&ispcrg 3>,64 <&ispcrg 4>,65 <&ispcrg 5>;66 clock-names = "cfg", "ref", "tx";67 resets = <&ispcrg 2>,68 <&ispcrg 3>;69 power-domains = <&aon_syscon 1>;70 #phy-cells = <0>;71 };72