69 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-tx.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Starfive SoC MIPI D-PHY Tx Controller8 9maintainers:10 - Keith Zhao <keith.zhao@starfivetech.com>11 - Shengyang Chen <shengyang.chen@starfivetech.com>12 13description:14 The Starfive SoC uses the MIPI DSI D-PHY based on M31 IP to transfer15 DSI data.16 17properties:18 compatible:19 const: starfive,jh7110-dphy-tx20 21 reg:22 maxItems: 123 24 clocks:25 maxItems: 126 27 clock-names:28 items:29 - const: txesc30 31 resets:32 items:33 - description: MIPITX_DPHY_SYS reset34 35 reset-names:36 items:37 - const: sys38 39 power-domains:40 maxItems: 141 42 "#phy-cells":43 const: 044 45required:46 - compatible47 - reg48 - clocks49 - clock-names50 - resets51 - reset-names52 - power-domains53 - "#phy-cells"54 55additionalProperties: false56 57examples:58 - |59 phy@295e0000 {60 compatible = "starfive,jh7110-dphy-tx";61 reg = <0x295e0000 0x10000>;62 clocks = <&voutcrg 14>;63 clock-names = "txesc";64 resets = <&syscrg 10>;65 reset-names = "sys";66 power-domains = <&aon_syscon 0>;67 #phy-cells = <0>;68 };69