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1Broadcom Cygnus IOMUX Controller2 3The Cygnus IOMUX controller supports group based mux configuration. In4addition, certain pins can be muxed to GPIO function individually.5 6Required properties:7 8- compatible:9 Must be "brcm,cygnus-pinmux"10 11- reg:12 Define the base and range of the I/O address space that contains the Cygnus13IOMUX registers14 15Properties in subnodes:16 17- function:18 The mux function to select19 20- groups:21 The list of groups to select with a given function22 23For more details, refer to24Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt25 26For example:27 28 pinmux: pinmux@0301d0c8 {29 compatible = "brcm,cygnus-pinmux";30 reg = <0x0301d0c8 0x1b0>;31 32 pinctrl-names = "default";33 pinctrl-0 = <&i2s0_default>;34 35 i2s0_default: i2s0_default {36 mux {37 function = "i2s0";38 groups = "i2s0_0_grp", "i2s0_1_grp";39 };40 };41 };42 43List of supported functions and groups in Cygnus:44 45"i2s0": "i2s0_0_grp", "i2s0_1_grp"46 47"i2s1": "i2s1_0_grp", "i2s1_1_grp"48 49"i2s2": "i2s2_0_grp", "i2s2_1_grp", "i2s2_2_grp", "i2s2_3_grp", "i2s2_4_grp"50 51"spdif": "spdif_grp"52 53"pwm0": "pwm0_grp"54 55"pwm1": "pwm1_grp"56 57"pwm2": "pwm2_grp"58 59"pwm3": "pwm3_grp"60 61"pwm4": "pwm4_grp"62 63"pwm5": "pwm5_grp"64 65"key": "key0_grp", "key1_grp", "key2_grp", "key3_grp", "key4_grp", "key5_grp",66"key6_grp", "key7_grp", "key8_grp", "key9_grp", "key10_grp", "key11_grp",67"key12_grp", "key13_grp", "key14_grp", "key15_grp"68 69"audio_dte": "audio_dte0_grp", "audio_dte1_grp", "audio_dte2_grp", "audio_dte3_grp"70 71"smart_card0": "smart_card0_grp", "smart_card0_fcb_grp"72 73"smart_card1": "smart_card1_grp", "smart_card1_fcb_grp"74 75"spi0": "spi0_grp"76 77"spi1": "spi1_grp"78 79"spi2": "spi2_grp"80 81"spi3": "spi3_grp"82 83"spi4": "spi4_0_grp", "spi4_1_grp"84 85"spi5": "spi5_grp"86 87"sw_led0": "sw_led0_0_grp", "sw_led0_1_grp"88 89"sw_led1": "sw_led1_grp"90 91"sw_led2": "sw_led2_0_grp", "sw_led2_1_grp"92 93"d1w": "d1w_grp"94 95"lcd": "lcd_grp"96 97"sram": "sram_0_grp", "sram_1_grp"98 99"uart0": "uart0_grp"100 101"uart1": "uart1_grp", "uart1_dte_grp"102 103"uart2": "uart2_grp"104 105"uart3": "uart3_grp"106 107"uart4": "uart4_grp"108 109"qspi": "qspi_0_grp", "qspi_1_grp"110 111"nand": "nand_grp"112 113"sdio0": "sdio0_grp", "sdio0_cd_grp", "sdio0_mmc_grp"114 115"sdio1": "sdio1_data_0_grp", "sdio1_data_1_grp", "sdio1_cd_grp",116"sdio1_led_grp", "sdio1_mmc_grp"117 118"can0": "can0_grp"119 120"can1": "can1_grp"121 122"cam": "cam_led_grp", "cam_0_grp", "cam_1_grp"123 124"bsc1": "bsc1_grp"125 126"pcie_clkreq": "pcie_clkreq_grp"127 128"usb0_oc": "usb0_oc_grp"129 130"usb1_oc": "usb1_oc_grp"131 132"usb2_oc": "usb2_oc_grp"133