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1* Freescale IMX27 IOMUX Controller2 3Required properties:4- compatible: "fsl,imx27-iomuxc"5 6The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.7 8Required properties for pin configuration node:9- fsl,pins: three integers array, represents a group of pins mux and config10  setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.11 12  PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable13  configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin14  number on the specific port (between 0 and 31).15 16  MUX_ID is17    function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10)18 19      function value is used to select the pin function.20      Possible values:21          0 - Primary function22          1 - Alternate function23          2 - GPIO24      Registers: GIUS (GPIO In Use), GPR (General Purpose Register)25 26      direction defines the data direction of the pin.27      Possible values:28          0 - Input29          1 - Output30      Register: DDIR31 32      gpio_oconf configures the gpio submodule output signal. This does not33      have any effect unless GPIO function is selected. A/B/C_IN are output34      signals of function blocks A,B and C. Specific function blocks are35      described in the reference manual.36      Possible values:37          0 - A_IN38          1 - B_IN39          2 - C_IN40          3 - Data Register41      Registers: OCR1, OCR242 43      gpio_iconfa/b configures the gpio submodule input to functionblocks A and44      B. GPIO function should be selected if this is configured.45      Possible values:46          0 - GPIO_IN47          1 - Interrupt Status Register48          2 - Pulldown49          3 - Pullup50      Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB251 52  CONFIG can be 0 or 1, meaning Pullup disable/enable.53 54 55The iomux controller has gpio child nodes which are embedded in the iomux56control registers. They have to be defined as child nodes of the iomux device57node. If gpio subnodes are defined "#address-cells", "#size-cells" and "ranges"58properties for the iomux device node are required.59 60Example:61 62iomuxc: iomuxc@10015000 {63	compatible = "fsl,imx27-iomuxc";64	reg = <0x10015000 0x600>;65	#address-cells = <1>;66	#size-cells = <1>;67	ranges;68 69	gpio1: gpio@10015000 {70		...71	};72 73	...74 75	uart {76		pinctrl_uart1: uart-1 {77			fsl,pins = <78				0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */79				0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */80				0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */81				0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */82			>;83		};84 85		...86	};87};88 89 90For convenience there are macros defined in imx27-pinfunc.h which provide PIN91and MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names92are defined in the i.MX27 reference manual.93 94The above example using macros:95 96iomuxc: iomuxc@10015000 {97	compatible = "fsl,imx27-iomuxc";98	reg = <0x10015000 0x600>;99	#address-cells = <1>;100	#size-cells = <1>;101	ranges;102 103	gpio1: gpio@10015000 {104		...105	};106 107	...108 109	uart {110		pinctrl_uart1: uart-1 {111			fsl,pins = <112				MX27_PAD_UART1_TXD__UART1_TXD 0x0113				MX27_PAD_UART1_RXD__UART1_RXD 0x0114				MX27_PAD_UART1_CTS__UART1_CTS 0x0115				MX27_PAD_UART1_RTS__UART1_RTS 0x0116			>;117		};118 119		...120	};121};122