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1* Freescale MXS Pin Controller2 3The pins controlled by mxs pin controller are organized in banks, each bank4has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th5function is GPIO. The configuration on the pins includes drive strength,6voltage and pull-up.7 8Required properties:9- compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"10- reg: Should contain the register physical address and length for the11 pin controller.12 13Please refer to pinctrl-bindings.txt in this directory for details of the14common pinctrl bindings used by client devices.15 16The node of mxs pin controller acts as a container for an arbitrary number of17subnodes. Each of these subnodes represents some desired configuration for18a group of pins, and only affects those parameters that are explicitly listed.19In other words, a subnode that describes a drive strength parameter implies no20information about pull-up. For this reason, even seemingly boolean values are21actually tristates in this binding: unspecified, off, or on. Unspecified is22represented as an absent property, and off/on are represented as integer23values 0 and 1.24 25Those subnodes under mxs pin controller node will fall into two categories.26One is to set up a group of pins for a function, both mux selection and pin27configurations, and it's called group node in the binding document. The other28one is to adjust the pin configuration for some particular pins that need a29different configuration than what is defined in group node. The binding30document calls this type of node config node.31 32On mxs, there is no hardware pin group. The pin group in this binding only33means a group of pins put together for particular peripheral to work in34particular function, like SSP0 functioning as mmc0-8bit. That said, the35group node should include all the pins needed for one function rather than36having these pins defined in several group nodes. It also means each of37"pinctrl-*" phandle in client device node should only have one group node38pointed in there, while the phandle can have multiple config node referenced39there to adjust configurations for some pins in the group.40 41Required subnode-properties:42- fsl,pinmux-ids: An integer array. Each integer in the array specify a pin43 with given mux function, with bank, pin and mux packed as below.44 45 [15..12] : bank number46 [11..4] : pin number47 [3..0] : mux selection48 49 This integer with mux selection packed is used as an entity by both group50 and config nodes to identify a pin. The mux selection in the integer takes51 effects only on group node, and will get ignored by driver with config node,52 since config node is only meant to set up pin configurations.53 54 Valid values for these integers are listed below.55 56- reg: Should be the index of the group nodes for same function. This property57 is required only for group nodes, and should not be present in any config58 nodes.59 60Optional subnode-properties:61- fsl,drive-strength: Integer.62 0: MXS_DRIVE_4mA63 1: MXS_DRIVE_8mA64 2: MXS_DRIVE_12mA65 3: MXS_DRIVE_16mA66- fsl,voltage: Integer.67 0: MXS_VOLTAGE_LOW - 1.8 V68 1: MXS_VOLTAGE_HIGH - 3.3 V69- fsl,pull-up: Integer.70 0: MXS_PULL_DISABLE - Disable the internal pull-up71 1: MXS_PULL_ENABLE - Enable the internal pull-up72 73Note that when enabling the pull-up, the internal pad keeper gets disabled.74Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up75will only disable the internal pad keeper.76 77Examples:78 79pinctrl@80018000 {80 #address-cells = <1>;81 #size-cells = <0>;82 compatible = "fsl,imx28-pinctrl";83 reg = <0x80018000 2000>;84 85 mmc0_8bit_pins_a: mmc0-8bit@0 {86 reg = <0>;87 fsl,pinmux-ids = <88 MX28_PAD_SSP0_DATA0__SSP0_D089 MX28_PAD_SSP0_DATA1__SSP0_D190 MX28_PAD_SSP0_DATA2__SSP0_D291 MX28_PAD_SSP0_DATA3__SSP0_D392 MX28_PAD_SSP0_DATA4__SSP0_D493 MX28_PAD_SSP0_DATA5__SSP0_D594 MX28_PAD_SSP0_DATA6__SSP0_D695 MX28_PAD_SSP0_DATA7__SSP0_D796 MX28_PAD_SSP0_CMD__SSP0_CMD97 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT98 MX28_PAD_SSP0_SCK__SSP0_SCK99 >;100 fsl,drive-strength = <MXS_DRIVE_4mA>;101 fsl,voltage = <MXS_VOLTAGE_HIGH>;102 fsl,pull-up = <MXS_PULL_ENABLE>;103 };104 105 mmc_cd_cfg: mmc-cd-cfg {106 fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;107 fsl,pull-up = <MXS_PULL_DISABLE>;108 };109 110 mmc_sck_cfg: mmc-sck-cfg {111 fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;112 fsl,drive-strength = <MXS_DRIVE_12mA>;113 fsl,pull-up = <MXS_PULL_DISABLE>;114 };115};116 117In this example, group node mmc0-8bit defines a group of pins for mxs SSP0118to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations119applied on all these pins. And config nodes mmc-cd-cfg and mmc-sck-cfg are120adjusting the configuration for pins card-detection and clock from what group121node mmc0-8bit defines. Only the configuration properties to be adjusted need122to be listed in the config nodes.123 124Valid values for i.MX28/i.MX23 pinmux-id are defined in125arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.126The definitions for the padconfig properties can be found in127arch/arm/boot/dts/mxs-pinfunc.h.128