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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra Pinmux Controller8 9maintainers:10  - Thierry Reding <thierry.reding@gmail.com>11  - Jonathan Hunter <jonathanh@nvidia.com>12 13description: |14  Please refer to pinctrl-bindings.txt in this directory for details of the15  common pinctrl bindings used by client devices, including the meaning of16  the phrase "pin configuration node".17 18  Tegra's pin configuration nodes act as a container for an arbitrary number19  of subnodes. Each of these subnodes represents some desired configuration20  for a pin, a group, or a list of pins or groups. This configuration can21  include the mux function to select on those pin(s)/ group(s), and various22  pin configuration parameters, such as pull-up, tristate, drive strength,23  etc.24 25  The name of each subnode is not important; all subnodes should be26  enumerated and processed purely based on their content.27 28  Each subnode only affects those parameters that are explicitly listed. In29  other words, a subnode that lists a mux function but no pin configuration30  parameters implies no information about any pin configuration parameters.31 32  Similarly, a pin subnode that describes a pullup parameter implies no33  information about e.g.  the mux function or tristate parameter. For this34  reason, even seemingly boolean values are actually tristates in this35  binding: unspecified, off, or on. Unspecified is represented as an absent36  property, and off/on are represented as integer values 0 and 1.37 38  Note that many of these properties are only valid for certain specific pins39  or groups. See the Tegra TRM and various pinmux spreadsheets for complete40  details regarding which groups support which functionality. The Linux41  pinctrl driver may also be a useful reference, since it consolidates,42  disambiguates, and corrects data from all those sources.43 44properties:45  nvidia,pins:46    $ref: /schemas/types.yaml#/definitions/string-array47    description: An array of strings. Each string contains the name of a pin48      or group.  Valid values for these names are listed below.49 50  nvidia,function:51    $ref: /schemas/types.yaml#/definitions/string52    description: A string containing the name of the function to mux to the53      pin or group. Valid values for function names are listed below. See the54      Tegra TRM to determine which are valid for each pin or group.55 56  nvidia,pull:57    description: Pull-down/up setting to apply to the pin.58    $ref: /schemas/types.yaml#/definitions/uint3259    oneOf:60      - description: none61        const: 062      - description: down63        const: 164      - description: up65        const: 266 67  nvidia,tristate:68    description: Tristate setting to apply to the pin.69    $ref: /schemas/types.yaml#/definitions/uint3270    oneOf:71      - description: drive72        const: 073      - description: tristate74        const: 175 76  nvidia,schmitt:77    description: Enable Schmitt trigger on the input.78    $ref: /schemas/types.yaml#/definitions/uint3279    oneOf:80      - description: disable Schmitt trigger on the input81        const: 082      - description: enable Schmitt trigger on the input83        const: 184 85  nvidia,pull-down-strength:86    description: Controls drive strength. 0 is weakest. The range of valid87      values depends on the pingroup. See "CAL_DRVDN" in the Tegra TRM.88    $ref: /schemas/types.yaml#/definitions/uint3289 90  nvidia,pull-up-strength:91    description: Controls drive strength. 0 is weakest. The range of valid92      values depends on the pingroup. See "CAL_DRVUP" in the Tegra TRM.93    $ref: /schemas/types.yaml#/definitions/uint3294 95  nvidia,high-speed-mode:96    description: Enable high speed mode the pins.97    $ref: /schemas/types.yaml#/definitions/uint3298    oneOf:99      - description: normal speed mode100        const: 0101      - description: high speed mode102        const: 1103 104  nvidia,low-power-mode:105    description: Controls the drive power or current. Valid values are from 0106      through 3, where 0 specifies the least power and 3 specifies the most107      power. See "Low Power Mode" or "LPMD1" and "LPMD0" in the Tegra TRM.108    $ref: /schemas/types.yaml#/definitions/uint32109    enum: [ 0, 1, 2, 3 ]110 111  nvidia,enable-input:112    description: Enable the pin's input path.113    $ref: /schemas/types.yaml#/definitions/uint32114    oneOf:115      - description: disable input (i.e. output only)116        const: 0117      - description: enable input118        const: 1119 120  nvidia,open-drain:121    description: Open-drain configuration for the pin.122    $ref: /schemas/types.yaml#/definitions/uint32123    oneOf:124      - description: disable open-drain125        const: 0126      - description: enable open-drain127        const: 1128 129  nvidia,lock:130    description: Lock the pin configuration against further changes until131      reset.132    $ref: /schemas/types.yaml#/definitions/uint32133    oneOf:134      - description: disable pin configuration lock135        const: 0136      - description: enable pin configuration lock137        const: 1138 139  nvidia,io-reset:140    description: reset the I/O path141    $ref: /schemas/types.yaml#/definitions/uint32142    enum: [ 0, 1 ]143 144  nvidia,rcv-sel:145    description: select VIL/VIH receivers146    $ref: /schemas/types.yaml#/definitions/uint32147    oneOf:148      - description: normal receivers149        const: 0150      - description: high-voltage receivers151        const: 1152 153  nvidia,drive-type:154    description: Drive type to configure for the pin.155    $ref: /schemas/types.yaml#/definitions/uint32156    enum: [ 0, 1, 2, 3 ]157 158  nvidia,io-hv:159    description: Select high-voltage receivers.160    $ref: /schemas/types.yaml#/definitions/uint32161    oneOf:162      - description: Use normal receivers.163        const: 0164      - description: Use high-voltage receivers.165        const: 1166 167  nvidia,slew-rate-rising:168    description: Controls rising signal slew rate. 0 is fastest. The range of169      valid values depends on the pingroup. See "DRVDN_SLWR" in the Tegra TRM.170    $ref: /schemas/types.yaml#/definitions/uint32171 172  nvidia,slew-rate-falling:173    description: Controls falling signal slew rate. 0 is fastest. The range of174      valid values depends on the pingroup. See "DRVUP_SLWF" in the Tegra TRM.175    $ref: /schemas/types.yaml#/definitions/uint32176 177additionalProperties: true178...179