53 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra234 Pinmux Controller8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13$ref: nvidia,tegra-pinmux-common.yaml14 15properties:16 nvidia,function:17 enum: [ gp, uartc, i2c8, spi2, i2c2, can1, can0, rsvd0, eth0, eth2,18 eth1, dp, eth3, i2c4, i2c7, i2c9, eqos, pe2, pe1, pe0, pe3,19 pe4, pe5, pe6, pe7, pe8, pe9, pe10, qspi0, qspi1, qpsi,20 sdmmc1, sce, soc, gpio, hdmi, ufs0, spi3, spi1, uartb, uarte,21 usb, extperiph2, extperiph1, i2c3, vi0, i2c5, uarta, uartd,22 i2c1, i2s4, i2s6, aud, spi5, touch, uartj, rsvd1, wdt, tsc,23 dmic3, led, vi0_alt, i2s5, nv, extperiph3, extperiph4, spi4,24 ccla, i2s1, i2s2, i2s3, i2s8, rsvd2, dmic5, dca, displayb,25 displaya, vi1, dcb, dmic1, dmic4, i2s7, dmic2, dspk0, rsvd3,26 tsc_alt, istctrl, vi1_alt, dspk1, igpu ]27 28 # out of the common properties, only these are allowed for Tegra23429 nvidia,pins: true30 nvidia,pull: true31 nvidia,tristate: true32 nvidia,schmitt: true33 nvidia,enable-input: true34 nvidia,open-drain: true35 nvidia,lock: true36 nvidia,drive-type: true37 nvidia,io-hv: true38 39required:40 - nvidia,pins41 42# We would typically use unevaluatedProperties here but that has the43# downside that all the properties in the common bindings become valid44# for all chip generations. In this case, however, we want the per-SoC45# bindings to be able to override which of the common properties are46# allowed, since not all pinmux generations support the same sets of47# properties. This way, the common bindings define the format of the48# properties but the per-SoC bindings define which of them apply to a49# given chip.50additionalProperties: false51 52...53