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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/pinctrl/qcom,ipq4019-pinctrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Technologies, Inc. IPQ4019 TLMM block8 9maintainers:10  - Bjorn Andersson <bjorn.andersson@linaro.org>11 12description: |13  Top Level Mode Multiplexer pin controller in Qualcomm IPQ4019 SoC.14 15allOf:16  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#17 18properties:19  compatible:20    const: qcom,ipq4019-pinctrl21 22  reg:23    maxItems: 124 25  interrupts:26    maxItems: 127 28  gpio-reserved-ranges: true29 30patternProperties:31  "-state$":32    oneOf:33      - $ref: "#/$defs/qcom-ipq4019-tlmm-state"34      - patternProperties:35          "-pins$":36            $ref: "#/$defs/qcom-ipq4019-tlmm-state"37        additionalProperties: false38 39  "-hog(-[0-9]+)?$":40    type: object41    required:42      - gpio-hog43 44$defs:45  qcom-ipq4019-tlmm-state:46    type: object47    description:48      Pinctrl node's client devices use subnodes for desired pin configuration.49      Client device subnodes use below standard properties.50    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state51    unevaluatedProperties: false52 53    properties:54      pins:55        description:56          List of gpio pins affected by the properties specified in this57          subnode.58        items:59          pattern: "^gpio([0-9]|[1-9][0-9])$"60        minItems: 161        maxItems: 3662 63      function:64        description:65          Specify the alternative function to be configured for the specified66          pins.67        enum: [ aud_pin, audio_pwm, blsp_i2c0, blsp_i2c1, blsp_spi0,68                blsp_spi1, blsp_uart0, blsp_uart1, chip_rst, gpio,69                i2s_rx, i2s_spdif_in, i2s_spdif_out, i2s_td, i2s_tx,70                jtag, led0, led1, led2, led3, led4, led5, led6, led7,71                led8, led9, led10, led11, mdc, mdio, pcie, pmu,72                prng_rosc, qpic, rgmii, rmii, sdio, smart0, smart1,73                smart2, smart3, tm, wifi0, wifi1 ]74 75    required:76      - pins77 78required:79  - compatible80  - reg81 82unevaluatedProperties: false83 84examples:85  - |86    #include <dt-bindings/interrupt-controller/arm-gic.h>87    tlmm: pinctrl@1000000 {88        compatible = "qcom,ipq4019-pinctrl";89        reg = <0x01000000 0x300000>;90 91        gpio-controller;92        #gpio-cells = <2>;93        gpio-ranges = <&tlmm 0 0 100>;94        interrupt-controller;95        #interrupt-cells = <2>;96        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;97 98        uart-state {99            pins = "gpio16", "gpio17";100            function = "blsp_uart0";101            bias-disable;102        };103    };104