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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2# Copyright 2023 Realtek Semiconductor Corporation3%YAML 1.24---5$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1315e-pinctrl.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Realtek DHC RTD1315E Pin Controller9 10maintainers:11 - TY Chang <tychang@realtek.com>12 13description:14 The Realtek DHC RTD1315E is a high-definition media processor SoC. The15 RTD1315E pin controller is used to control pin function, pull up/down16 resistor, drive strength, schmitt trigger and power source.17 18properties:19 compatible:20 const: realtek,rtd1315e-pinctrl21 22 reg:23 maxItems: 124 25patternProperties:26 '-pins$':27 type: object28 allOf:29 - $ref: pincfg-node.yaml#30 - $ref: pinmux-node.yaml#31 32 properties:33 pins:34 items:35 enum: [ gpio_0, gpio_1, emmc_rst_n, emmc_dd_sb, emmc_clk, emmc_cmd,36 gpio_6, gpio_7, gpio_8, gpio_9, gpio_10, gpio_11, gpio_12,37 gpio_13, gpio_14, gpio_15, gpio_16, gpio_17, gpio_18, gpio_19,38 gpio_20, emmc_data_0, emmc_data_1, emmc_data_2, usb_cc2, gpio_25,39 gpio_26, gpio_27, gpio_28, gpio_29, gpio_30, gpio_31, gpio_32,40 gpio_33, gpio_34, gpio_35, hif_data, hif_en, hif_rdy, hif_clk,41 gpio_dummy_40, gpio_dummy_41, gpio_dummy_42, gpio_dummy_43,42 gpio_dummy_44, gpio_dummy_45, gpio_46, gpio_47, gpio_48, gpio_49,43 gpio_50, usb_cc1, emmc_data_3, emmc_data_4, ir_rx, ur0_rx, ur0_tx,44 gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_dummy_63,45 gpio_dummy_64, gpio_dummy_65, gpio_66, gpio_67, gpio_68, gpio_69,46 gpio_70, gpio_71, gpio_72, gpio_dummy_73, emmc_data_5, emmc_data_6,47 emmc_data_7, gpio_dummy_77, gpio_78, gpio_79, gpio_80, gpio_81,48 ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en,49 ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc,50 dmic_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc, tdm_ai_loc,51 ai_loc, spdif_loc, hif_en_loc, scan_switch, wd_rset, boot_sel,52 reset_n, testmode ]53 54 function:55 enum: [ gpio, nf, emmc, ao, gspi_loc0, gspi_loc1, uart0, uart1,56 uart2_loc0, uart2_loc1, i2c0, i2c1, i2c4, i2c5, pcie1,57 etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1, pwm1_loc0,58 pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0, pwm3_loc1,59 spdif_optical_loc0, spdif_optical_loc1, usb_cc1, usb_cc2,60 sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1, tdm_ai_loc0,61 tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0,62 vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1, vtc_tdm_loc0,63 vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1,64 ir_rx, uart2_disable, gspi_disable, hi_width_disable,65 hi_width_1bit, sf_disable, sf_enable, scpu_ejtag_loc0,66 scpu_ejtag_loc1, scpu_ejtag_loc2, scpu_ejtag_loc3,67 acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2,68 vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2,69 aucpu_ejtag_loc0, aucpu_ejtag_loc1, aucpu_ejtag_loc2,70 gpu_ejtag, iso_tristate, dbg_out0, dbg_out1, standby_dbg,71 spdif, arm_trace_debug_disable, arm_trace_debug_enable,72 aucpu_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable,73 scpu_ejtag_disable, vtc_dmic_loc_disable, vtc_tdm_disable,74 vtc_i2si_disable, tdm_ai_disable, ai_disable, spdif_disable,75 hif_disable, hif_enable, test_loop, pmic_pwrup ]76 77 drive-strength:78 enum: [4, 8]79 80 bias-pull-down: true81 82 bias-pull-up: true83 84 bias-disable: true85 86 input-schmitt-enable: true87 88 input-schmitt-disable: true89 90 drive-push-pull: true91 92 power-source:93 description: |94 Valid arguments are described as below:95 0: power supply of 1.8V96 1: power supply of 3.3V97 enum: [0, 1]98 99 realtek,drive-strength-p:100 description: |101 Some of pins can be driven using the P-MOS and N-MOS transistor to102 achieve finer adjustments. The block-diagram representation is as103 follows:104 VDD105 |106 ||--+107 +-----o|| P-MOS-FET108 | ||--+109 IN --+ +----- out110 | ||--+111 +------|| N-MOS-FET112 ||--+113 |114 GND115 The driving strength of the P-MOS/N-MOS transistors impacts the116 waveform's rise/fall times. Greater driving strength results in117 shorter rise/fall times. Each P-MOS and N-MOS transistor offers118 8 configurable levels (0 to 7), with higher values indicating119 greater driving strength, contributing to achieving the desired120 speed.121 122 The realtek,drive-strength-p is used to control the driving strength123 of the P-MOS output.124 $ref: /schemas/types.yaml#/definitions/uint32125 minimum: 0126 maximum: 7127 128 realtek,drive-strength-n:129 description: |130 Similar to the realtek,drive-strength-p, the realtek,drive-strength-n131 is used to control the driving strength of the N-MOS output.132 $ref: /schemas/types.yaml#/definitions/uint32133 minimum: 0134 maximum: 7135 136 realtek,duty-cycle:137 description: |138 An integer describing the level to adjust output duty cycle, controlling139 the proportion of positive and negative waveforms in nanoseconds.140 Valid arguments are described as below:141 0: 0ns142 2: + 0.25ns143 3: + 0.5ns144 4: -0.25ns145 5: -0.5ns146 $ref: /schemas/types.yaml#/definitions/uint32147 enum: [ 0, 2, 3, 4, 5 ]148 149 required:150 - pins151 152 additionalProperties: false153 154required:155 - compatible156 - reg157 158additionalProperties: false159 160examples:161 - |162 pinctrl@4e000 {163 compatible = "realtek,rtd1315e-pinctrl";164 reg = <0x4e000 0x130>;165 166 emmc-hs200-pins {167 pins = "emmc_clk",168 "emmc_cmd",169 "emmc_data_0",170 "emmc_data_1",171 "emmc_data_2",172 "emmc_data_3",173 "emmc_data_4",174 "emmc_data_5",175 "emmc_data_6",176 "emmc_data_7";177 function = "emmc";178 realtek,drive-strength-p = <0x2>;179 realtek,drive-strength-n = <0x2>;180 };181 182 i2c-0-pins {183 pins = "gpio_12",184 "gpio_13";185 function = "i2c0";186 drive-strength = <4>;187 };188 };189