197 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Renesas Pin Function Controller (GPIO and Pin Mux/Config)8 9maintainers:10 - Geert Uytterhoeven <geert+renesas@glider.be>11 12description:13 The Pin Function Controller (PFC) is a Pin Mux/Config controller.14 On SH/R-Mobile SoCs it also acts as a GPIO controller.15 16properties:17 compatible:18 enum:19 - renesas,pfc-emev2 # EMMA Mobile EV220 - renesas,pfc-r8a73a4 # R-Mobile APE621 - renesas,pfc-r8a7740 # R-Mobile A122 - renesas,pfc-r8a7742 # RZ/G1H23 - renesas,pfc-r8a7743 # RZ/G1M24 - renesas,pfc-r8a7744 # RZ/G1N25 - renesas,pfc-r8a7745 # RZ/G1E26 - renesas,pfc-r8a77470 # RZ/G1C27 - renesas,pfc-r8a774a1 # RZ/G2M28 - renesas,pfc-r8a774a3 # RZ/G2M v3.029 - renesas,pfc-r8a774b1 # RZ/G2N30 - renesas,pfc-r8a774c0 # RZ/G2E31 - renesas,pfc-r8a774e1 # RZ/G2H32 - renesas,pfc-r8a7778 # R-Car M133 - renesas,pfc-r8a7779 # R-Car H134 - renesas,pfc-r8a7790 # R-Car H235 - renesas,pfc-r8a7791 # R-Car M2-W36 - renesas,pfc-r8a7792 # R-Car V2H37 - renesas,pfc-r8a7793 # R-Car M2-N38 - renesas,pfc-r8a7794 # R-Car E239 - renesas,pfc-r8a7795 # R-Car H340 - renesas,pfc-r8a7796 # R-Car M3-W41 - renesas,pfc-r8a77961 # R-Car M3-W+42 - renesas,pfc-r8a77965 # R-Car M3-N43 - renesas,pfc-r8a77970 # R-Car V3M44 - renesas,pfc-r8a77980 # R-Car V3H45 - renesas,pfc-r8a77990 # R-Car E346 - renesas,pfc-r8a77995 # R-Car D347 - renesas,pfc-r8a779a0 # R-Car V3U48 - renesas,pfc-r8a779f0 # R-Car S4-849 - renesas,pfc-r8a779g0 # R-Car V4H50 - renesas,pfc-r8a779h0 # R-Car V4M51 - renesas,pfc-sh73a0 # SH-Mobile AG552 53 reg:54 minItems: 155 maxItems: 1056 57 gpio-controller: true58 59 '#gpio-cells':60 const: 261 62 gpio-ranges:63 minItems: 164 maxItems: 1665 66 interrupts-extended:67 minItems: 3268 maxItems: 6469 description:70 Specify the interrupts associated with external IRQ pins on SoCs where71 the PFC acts as a GPIO controller. It must contain one interrupt per72 external IRQ, sorted by external IRQ number.73 74 power-domains:75 maxItems: 176 77allOf:78 - $ref: pinctrl.yaml#79 80required:81 - compatible82 - reg83 84if:85 properties:86 compatible:87 enum:88 - renesas,pfc-r8a73a489 - renesas,pfc-r8a774090 - renesas,pfc-sh73a091then:92 required:93 - interrupts-extended94 - gpio-controller95 - '#gpio-cells'96 - gpio-ranges97 - power-domains98 99additionalProperties:100 anyOf:101 - type: object102 allOf:103 - $ref: pincfg-node.yaml#104 - $ref: pinmux-node.yaml#105 106 description:107 Pin controller client devices use pin configuration subnodes (children108 and grandchildren) for desired pin configuration.109 Client device subnodes use below standard properties.110 111 properties:112 function: true113 groups: true114 pins: true115 bias-disable: true116 bias-pull-down: true117 bias-pull-up: true118 drive-strength:119 enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values120 power-source:121 enum: [ 1800, 3300 ]122 gpio-hog: true123 gpios: true124 input: true125 output-high: true126 output-low: true127 128 additionalProperties: false129 130 - type: object131 additionalProperties:132 $ref: "#/additionalProperties/anyOf/0"133 134examples:135 - |136 pfc: pinctrl@e6050000 {137 compatible = "renesas,pfc-r8a7740";138 reg = <0xe6050000 0x8000>,139 <0xe605800c 0x20>;140 gpio-controller;141 #gpio-cells = <2>;142 gpio-ranges = <&pfc 0 0 212>;143 interrupts-extended =144 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,145 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,146 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,147 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,148 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,149 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,150 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,151 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;152 power-domains = <&pd_c5>;153 154 lcd0-mux-hog {155 /* DBGMD/LCDC0/FSIA MUX */156 gpio-hog;157 gpios = <176 0>;158 output-high;159 };160 };161 162 - |163 pinctrl@e6060000 {164 compatible = "renesas,pfc-r8a7795";165 reg = <0xe6060000 0x50c>;166 167 avb_pins: avb {168 mux {169 groups = "avb_link", "avb_mdio", "avb_mii";170 function = "avb";171 };172 173 pins_mdio {174 groups = "avb_mdio";175 drive-strength = <24>;176 };177 178 pins_mii_tx {179 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC",180 "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2",181 "PIN_AVB_TD3";182 drive-strength = <12>;183 };184 };185 186 keys_pins: keys {187 pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1";188 bias-pull-up;189 };190 191 sdhi0_pins: sd0 {192 groups = "sdhi0_data4", "sdhi0_ctrl";193 function = "sdhi0";194 power-source = <3300>;195 };196 };197