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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung SoC PWM timers8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Krzysztof Kozlowski <krzk@kernel.org>12 13description: |+14 Samsung SoCs contain PWM timer blocks which can be used for system clock source15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each16 PWM timer block provides 5 PWM channels (not all of them can drive physical17 outputs - see SoC and board manual).18 19 Be aware that the clocksource driver supports only uniprocessor systems.20 21properties:22 compatible:23 oneOf:24 - enum:25 - samsung,s3c2410-pwm # 16-bit, S3C24xx26 - samsung,s3c6400-pwm # 32-bit, S3C64xx27 - samsung,s5p6440-pwm # 32-bit, S5P64x028 - samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs29 - samsung,exynos4210-pwm # 32-bit, Exynos30 - items:31 - enum:32 - samsung,exynos5433-pwm33 - samsung,exynos7-pwm34 - samsung,exynosautov9-pwm35 - samsung,exynosautov920-pwm36 - tesla,fsd-pwm37 - const: samsung,exynos4210-pwm38 39 reg:40 maxItems: 141 42 clocks:43 minItems: 144 maxItems: 345 46 clock-names:47 description: |48 Should contain all following required clock names:49 - "timers" - PWM base clock used to generate PWM signals,50 and any subset of following optional clock names:51 - "pwm-tclk0" - first external PWM clock source,52 - "pwm-tclk1" - second external PWM clock source.53 Note that not all IP variants allow using all external clock sources.54 Refer to SoC documentation to learn which clock source configurations55 are available.56 oneOf:57 - items:58 - const: timers59 - items:60 - const: timers61 - const: pwm-tclk062 - items:63 - const: timers64 - const: pwm-tclk165 - items:66 - const: timers67 - const: pwm-tclk068 - const: pwm-tclk169 70 interrupts:71 description:72 One interrupt per timer, starting at timer 0. Necessary only for SoCs which73 use PWM clocksource.74 minItems: 175 maxItems: 576 77 "#pwm-cells":78 description:79 The only third cell flag supported by this binding80 is PWM_POLARITY_INVERTED.81 const: 382 83 samsung,pwm-outputs:84 description:85 A list of PWM channels used as PWM outputs on particular platform.86 It is an array of up to 5 elements being indices of PWM channels87 (from 0 to 4), the order does not matter.88 $ref: /schemas/types.yaml#/definitions/uint32-array89 uniqueItems: true90 items:91 minimum: 092 maximum: 493 94required:95 - clocks96 - clock-names97 - compatible98 - reg99 100additionalProperties: false101 102allOf:103 - $ref: pwm.yaml#104 105 - if:106 properties:107 compatible:108 contains:109 enum:110 - samsung,s3c2410-pwm111 - samsung,s3c6400-pwm112 - samsung,s5p6440-pwm113 - samsung,s5pc100-pwm114 then:115 required:116 - interrupts117 118examples:119 - |120 pwm@7f006000 {121 compatible = "samsung,s3c6400-pwm";122 reg = <0x7f006000 0x1000>;123 interrupt-parent = <&vic0>;124 interrupts = <23>, <24>, <25>, <27>, <28>;125 clocks = <&clock 67>;126 clock-names = "timers";127 samsung,pwm-outputs = <0>, <1>;128 #pwm-cells = <3>;129 };130