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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar)8 9maintainers:10 - Bjorn Andersson <andersson@kernel.org>11 - Sibi Sankar <quic_sibis@quicinc.com>12 13description:14 MSS Peripheral Image Loader loads and boots firmware on the15 Qualcomm Technology Inc. MSM8996 Modem Hexagon Core (and similar).16 17properties:18 compatible:19 enum:20 - qcom,msm8996-mss-pil21 - qcom,msm8998-mss-pil22 - qcom,sdm660-mss-pil23 - qcom,sdm845-mss-pil24 25 reg:26 items:27 - description: MSS QDSP6 registers28 - description: RMB registers29 30 reg-names:31 items:32 - const: qdsp633 - const: rmb34 35 iommus:36 items:37 - description: MSA Stream 138 - description: MSA Stream 239 40 interrupts:41 items:42 - description: Watchdog interrupt43 - description: Fatal interrupt44 - description: Ready interrupt45 - description: Handover interrupt46 - description: Stop acknowledge interrupt47 - description: Shutdown acknowledge interrupt48 49 interrupt-names:50 items:51 - const: wdog52 - const: fatal53 - const: ready54 - const: handover55 - const: stop-ack56 - const: shutdown-ack57 58 clocks:59 minItems: 860 maxItems: 961 62 clock-names:63 minItems: 864 maxItems: 965 66 power-domains:67 items:68 - description: CX power domain69 - description: MX power domain70 - description: MSS power domain (only valid for qcom,sdm845-mss-pil)71 minItems: 272 73 power-domain-names:74 items:75 - const: cx76 - const: mx77 - const: mss # only valid for qcom,sdm845-mss-pil78 minItems: 279 80 pll-supply:81 description: PLL supply82 83 resets:84 items:85 - description: AOSS restart86 - description: PDC reset (only valid for qcom,sdm845-mss-pil)87 minItems: 188 89 reset-names:90 items:91 - const: mss_restart92 - const: pdc_reset # only valid for qcom,sdm845-mss-pil93 minItems: 194 95 qcom,qmp:96 $ref: /schemas/types.yaml#/definitions/phandle97 description: Reference to the AOSS side-channel message RAM.98 99 qcom,smem-states:100 $ref: /schemas/types.yaml#/definitions/phandle-array101 description: States used by the AP to signal the Hexagon core102 items:103 - description: Stop modem104 105 qcom,smem-state-names:106 description: Names of the states used by the AP to signal the Hexagon core107 items:108 - const: stop109 110 qcom,halt-regs:111 $ref: /schemas/types.yaml#/definitions/phandle-array112 description:113 Halt registers are used to halt transactions of various sub-components114 within MSS.115 items:116 - items:117 - description: phandle to TCSR syscon region118 - description: offset to the Q6 halt register119 - description: offset to the modem halt register120 - description: offset to the nc halt register121 122 memory-region:123 items:124 - description: MBA reserved region125 - description: Modem reserved region126 - description: Metadata reserved region127 128 firmware-name:129 $ref: /schemas/types.yaml#/definitions/string-array130 items:131 - description: Name of MBA firmware132 - description: Name of modem firmware133 134 smd-edge:135 $ref: /schemas/remoteproc/qcom,smd-edge.yaml#136 description:137 Qualcomm Shared Memory subnode which represents communication edge,138 channels and devices related to the Modem.139 unevaluatedProperties: false140 141 glink-edge:142 $ref: /schemas/remoteproc/qcom,glink-edge.yaml#143 description:144 Qualcomm G-Link subnode which represents communication edge, channels145 and devices related to the Modem.146 unevaluatedProperties: false147 148 # Deprecated properties149 mba:150 type: object151 description:152 MBA reserved region153 154 properties:155 memory-region: true156 157 required:158 - memory-region159 160 additionalProperties: false161 deprecated: true162 163 mpss:164 type: object165 description:166 MPSS reserved region167 168 properties:169 memory-region: true170 171 required:172 - memory-region173 174 additionalProperties: false175 deprecated: true176 177 metadata:178 type: object179 description:180 Metadata reserved region181 182 properties:183 memory-region: true184 185 required:186 - memory-region187 188 additionalProperties: false189 deprecated: true190 191required:192 - compatible193 - reg194 - reg-names195 - interrupts196 - interrupt-names197 - clocks198 - clock-names199 - power-domains200 - power-domain-names201 - resets202 - reset-names203 - qcom,halt-regs204 - qcom,smem-states205 - qcom,smem-state-names206 207allOf:208 - if:209 properties:210 compatible:211 const: qcom,msm8996-mss-pil212 then:213 properties:214 clocks:215 items:216 - description: GCC MSS IFACE clock217 - description: GCC MSS BUS clock218 - description: GCC MSS MEM clock219 - description: RPM XO clock220 - description: GCC MSS GPLL0 clock221 - description: GCC MSS SNOC_AXI clock222 - description: GCC MSS MNOC_AXI clock223 - description: RPM QDSS clock224 clock-names:225 items:226 - const: iface227 - const: bus228 - const: mem229 - const: xo230 - const: gpll0_mss231 - const: snoc_axi232 - const: mnoc_axi233 - const: qdss234 required:235 - pll-supply236 - smd-edge237 else:238 properties:239 pll-supply: false240 smd-edge: false241 242 - if:243 properties:244 compatible:245 enum:246 - qcom,msm8998-mss-pil247 - qcom,sdm660-mss-pil248 then:249 properties:250 clocks:251 items:252 - description: GCC MSS IFACE clock253 - description: GCC MSS BUS clock254 - description: GCC MSS MEM clock255 - description: GCC MSS GPLL0 clock256 - description: GCC MSS SNOC_AXI clock257 - description: GCC MSS MNOC_AXI clock258 - description: RPMH QDSS clock259 - description: RPMH XO clock260 clock-names:261 items:262 - const: iface263 - const: bus264 - const: mem265 - const: gpll0_mss266 - const: snoc_axi267 - const: mnoc_axi268 - const: qdss269 - const: xo270 required:271 - glink-edge272 273 - if:274 properties:275 compatible:276 const: qcom,sdm845-mss-pil277 then:278 properties:279 power-domains:280 minItems: 3281 power-domain-names:282 minItems: 3283 resets:284 minItems: 2285 reset-names:286 minItems: 2287 clocks:288 items:289 - description: GCC MSS IFACE clock290 - description: GCC MSS BUS clock291 - description: GCC MSS MEM clock292 - description: GCC MSS GPLL0 clock293 - description: GCC MSS SNOC_AXI clock294 - description: GCC MSS MNOC_AXI clock295 - description: GCC MSS PRNG clock296 - description: RPMH XO clock297 clock-names:298 items:299 - const: iface300 - const: bus301 - const: mem302 - const: gpll0_mss303 - const: snoc_axi304 - const: mnoc_axi305 - const: prng306 - const: xo307 required:308 - qcom,qmp309 - glink-edge310 else:311 properties:312 iommus: false313 power-domains:314 maxItems: 2315 power-domain-names:316 maxItems: 2317 resets:318 maxItems: 1319 reset-names:320 maxItems: 1321 qcom,qmp: false322 323 # Fallbacks for deprecated properties324 - oneOf:325 - required:326 - memory-region327 - required:328 - mba329 - mpss330 - metadata331 332additionalProperties: false333 334examples:335 - |336 #include <dt-bindings/clock/qcom,gcc-sdm845.h>337 #include <dt-bindings/clock/qcom,rpmh.h>338 #include <dt-bindings/interrupt-controller/arm-gic.h>339 #include <dt-bindings/power/qcom-rpmpd.h>340 #include <dt-bindings/reset/qcom,sdm845-aoss.h>341 #include <dt-bindings/reset/qcom,sdm845-pdc.h>342 343 remoteproc@4080000 {344 compatible = "qcom,sdm845-mss-pil";345 reg = <0x04080000 0x408>, <0x04180000 0x48>;346 reg-names = "qdsp6", "rmb";347 348 interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,349 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,350 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,351 <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,352 <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,353 <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;354 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack",355 "shutdown-ack";356 357 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,358 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,359 <&gcc GCC_BOOT_ROM_AHB_CLK>,360 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,361 <&gcc GCC_MSS_SNOC_AXI_CLK>,362 <&gcc GCC_MSS_MFAB_AXIS_CLK>,363 <&gcc GCC_PRNG_AHB_CLK>,364 <&rpmhcc RPMH_CXO_CLK>;365 clock-names = "iface", "bus", "mem", "gpll0_mss",366 "snoc_axi", "mnoc_axi", "prng", "xo";367 368 power-domains = <&rpmhpd SDM845_CX>,369 <&rpmhpd SDM845_MX>,370 <&rpmhpd SDM845_MSS>;371 power-domain-names = "cx", "mx", "mss";372 373 memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;374 375 resets = <&aoss_reset AOSS_CC_MSS_RESTART>,376 <&pdc_reset PDC_MODEM_SYNC_RESET>;377 reset-names = "mss_restart", "pdc_reset";378 379 qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;380 381 qcom,qmp = <&aoss_qmp>;382 383 qcom,smem-states = <&modem_smp2p_out 0>;384 qcom,smem-state-names = "stop";385 386 glink-edge {387 interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;388 label = "modem";389 qcom,remote-pid = <1>;390 mboxes = <&apss_shared 12>;391 };392 };393