96 lines · yaml
1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm QCS404 Peripheral Authentication Service8 9maintainers:10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>11 12description:13 Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots14 firmware on the Qualcomm DSP Hexagon cores.15 16properties:17 compatible:18 enum:19 - qcom,qcs404-adsp-pas20 - qcom,qcs404-cdsp-pas21 - qcom,qcs404-wcss-pas22 23 reg:24 maxItems: 125 26 clocks:27 items:28 - description: XO clock29 30 clock-names:31 items:32 - const: xo33 34 interrupts:35 maxItems: 536 37 interrupt-names:38 maxItems: 539 40 power-domains: false41 power-domain-names: false42 smd-edge: false43 44 memory-region:45 maxItems: 146 description: Reference to the reserved-memory for the Hexagon core47 48 firmware-name:49 maxItems: 150 description: Firmware name for the Hexagon core51 52required:53 - compatible54 - reg55 - memory-region56 57allOf:58 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#59 60unevaluatedProperties: false61 62examples:63 - |64 #include <dt-bindings/interrupt-controller/arm-gic.h>65 #include <dt-bindings/interrupt-controller/irq.h>66 67 remoteproc@c700000 {68 compatible = "qcom,qcs404-adsp-pas";69 reg = <0x0c700000 0x4040>;70 71 clocks = <&xo_board>;72 clock-names = "xo";73 74 interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,75 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,76 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,77 <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,78 <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;79 interrupt-names = "wdog", "fatal", "ready",80 "handover", "stop-ack";81 82 memory-region = <&adsp_fw_mem>;83 84 qcom,smem-states = <&adsp_smp2p_out 0>;85 qcom,smem-state-names = "stop";86 87 glink-edge {88 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;89 90 qcom,remote-pid = <2>;91 mboxes = <&apcs_glb 8>;92 93 label = "adsp";94 };95 };96