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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm SC7180 MSS Peripheral Image Loader8 9maintainers:10 - Sibi Sankar <quic_sibis@quicinc.com>11 12description:13 This document describes the hardware for a component that loads and boots firmware14 on the Qualcomm Technology Inc. SC7180 Modem Hexagon Core.15 16properties:17 compatible:18 enum:19 - qcom,sc7180-mss-pil20 21 reg:22 items:23 - description: MSS QDSP6 registers24 - description: RMB registers25 26 reg-names:27 items:28 - const: qdsp629 - const: rmb30 31 iommus:32 items:33 - description: MSA Stream 134 - description: MSA Stream 235 36 interrupts:37 items:38 - description: Watchdog interrupt39 - description: Fatal interrupt40 - description: Ready interrupt41 - description: Handover interrupt42 - description: Stop acknowledge interrupt43 - description: Shutdown acknowledge interrupt44 45 interrupt-names:46 items:47 - const: wdog48 - const: fatal49 - const: ready50 - const: handover51 - const: stop-ack52 - const: shutdown-ack53 54 clocks:55 items:56 - description: GCC MSS IFACE clock57 - description: GCC MSS BUS clock58 - description: GCC MSS NAV clock59 - description: GCC MSS SNOC_AXI clock60 - description: GCC MSS MFAB_AXIS clock61 - description: RPMH XO clock62 63 clock-names:64 items:65 - const: iface66 - const: bus67 - const: nav68 - const: snoc_axi69 - const: mnoc_axi70 - const: xo71 72 power-domains:73 items:74 - description: CX power domain75 - description: MX power domain76 - description: MSS power domain77 78 power-domain-names:79 items:80 - const: cx81 - const: mx82 - const: mss83 84 resets:85 items:86 - description: AOSS restart87 - description: PDC reset88 89 reset-names:90 items:91 - const: mss_restart92 - const: pdc_reset93 94 memory-region:95 items:96 - description: MBA reserved region97 - description: modem reserved region98 - description: metadata reserved region99 100 firmware-name:101 $ref: /schemas/types.yaml#/definitions/string-array102 items:103 - description: Name of MBA firmware104 - description: Name of modem firmware105 106 qcom,halt-regs:107 $ref: /schemas/types.yaml#/definitions/phandle-array108 description:109 Halt registers are used to halt transactions of various sub-components110 within MSS.111 items:112 - items:113 - description: phandle to TCSR_MUTEX registers114 - description: offset to the Q6 halt register115 - description: offset to the modem halt register116 - description: offset to the nc halt register117 118 qcom,spare-regs:119 $ref: /schemas/types.yaml#/definitions/phandle-array120 description:121 Spare registers are multipurpose registers used for errata122 handling.123 items:124 - items:125 - description: phandle to TCSR_MUTEX registers126 - description: offset to the conn_box_spare0 register127 128 qcom,qmp:129 $ref: /schemas/types.yaml#/definitions/phandle130 description: Reference to the AOSS side-channel message RAM.131 132 qcom,smem-states:133 $ref: /schemas/types.yaml#/definitions/phandle-array134 description: States used by the AP to signal the Hexagon core135 items:136 - description: Stop the modem137 138 qcom,smem-state-names:139 description: The names of the state bits used for SMP2P output140 const: stop141 142 glink-edge:143 $ref: qcom,glink-edge.yaml#144 unevaluatedProperties: false145 description:146 Qualcomm G-Link subnode which represents communication edge, channels147 and devices related to the DSP.148 149 properties:150 interrupts:151 items:152 - description: IRQ from MSS to GLINK153 154 mboxes:155 items:156 - description: Mailbox for communication between APPS and MSS157 158 label:159 const: modem160 161 apr: false162 fastrpc: false163 164required:165 - compatible166 - reg167 - reg-names168 - iommus169 - interrupts170 - interrupt-names171 - clocks172 - clock-names173 - power-domains174 - power-domain-names175 - resets176 - reset-names177 - qcom,halt-regs178 - qcom,spare-regs179 - memory-region180 - qcom,qmp181 - qcom,smem-states182 - qcom,smem-state-names183 - glink-edge184 185additionalProperties: false186 187examples:188 - |189 #include <dt-bindings/clock/qcom,gcc-sc7180.h>190 #include <dt-bindings/clock/qcom,rpmh.h>191 #include <dt-bindings/interrupt-controller/arm-gic.h>192 #include <dt-bindings/power/qcom-rpmpd.h>193 #include <dt-bindings/reset/qcom,sdm845-aoss.h>194 #include <dt-bindings/reset/qcom,sdm845-pdc.h>195 196 remoteproc_mpss: remoteproc@4080000 {197 compatible = "qcom,sc7180-mss-pil";198 reg = <0x04080000 0x10000>, <0x04180000 0x48>;199 reg-names = "qdsp6", "rmb";200 201 iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;202 203 interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,204 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,205 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,206 <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,207 <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,208 <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;209 210 interrupt-names = "wdog", "fatal", "ready", "handover",211 "stop-ack", "shutdown-ack";212 213 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,214 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,215 <&gcc GCC_MSS_NAV_AXI_CLK>,216 <&gcc GCC_MSS_SNOC_AXI_CLK>,217 <&gcc GCC_MSS_MFAB_AXIS_CLK>,218 <&rpmhcc RPMH_CXO_CLK>;219 clock-names = "iface", "bus", "nav", "snoc_axi",220 "mnoc_axi", "xo";221 222 power-domains = <&rpmhpd SC7180_CX>,223 <&rpmhpd SC7180_MX>,224 <&rpmhpd SC7180_MSS>;225 power-domain-names = "cx", "mx", "mss";226 227 memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;228 229 qcom,qmp = <&aoss_qmp>;230 231 qcom,smem-states = <&modem_smp2p_out 0>;232 qcom,smem-state-names = "stop";233 234 resets = <&aoss_reset AOSS_CC_MSS_RESTART>,235 <&pdc_reset PDC_MODEM_SYNC_RESET>;236 reset-names = "mss_restart", "pdc_reset";237 238 qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;239 qcom,spare-regs = <&tcsr_regs 0xb3e4>;240 241 glink-edge {242 interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;243 mboxes = <&apss_shared 12>;244 qcom,remote-pid = <1>;245 label = "modem";246 };247 };248