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1TI Keystone DSP devices2=======================3 4The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core5sub-systems that are used to offload some of the processor-intensive tasks or6algorithms, for achieving various system level goals.7 8These processor sub-systems usually contain additional sub-modules like L19and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller,10a dedicated local power/sleep controller etc. The DSP processor core in11Keystone 2 SoCs is usually a TMS320C66x CorePac processor.12 13DSP Device Node:14================15Each DSP Core sub-system is represented as a single DT node, and should also16have an alias with the stem 'rproc' defined. Each node has a number of required17or optional properties that enable the OS running on the host processor (ARM18CorePac) to perform the device management of the remote processor and to19communicate with the remote processor.20 21Required properties:22--------------------23The following are the mandatory properties:24 25- compatible: Should be one of the following,26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs30 31- reg: Should contain an entry for each value in 'reg-names'.32 Each entry should have the memory region's start address33 and the size of the region, the representation matching34 the parent node's '#address-cells' and '#size-cells' values.35 36- reg-names: Should contain strings with the following names, each37 representing a specific internal memory region, and38 should be defined in this order,39 "l2sram", "l1pram", "l1dram"40 41- ti,syscon-dev: Should be a pair of the phandle to the Keystone Device42 State Control node, and the register offset of the DSP43 boot address register within that node's address space.44 45- resets: Should contain the phandle to the reset controller node46 managing the resets for this device, and a reset47 specifier. Please refer to either of the following reset48 bindings for the reset argument specifier as per SoC,49 Documentation/devicetree/bindings/reset/ti-syscon-reset.txt50 for 66AK2HK/66AK2L/66AK2E SoCs or,51 Documentation/devicetree/bindings/reset/ti,sci-reset.yaml52 for 66AK2G SoCs53 54- interrupts: Should contain an entry for each value in 'interrupt-names'.55 Each entry should have the interrupt source number used by56 the remote processor to the host processor. The values should57 follow the interrupt-specifier format as dictated by the58 'interrupt-parent' node. The purpose of each is as per the59 description in the 'interrupt-names' property.60 61- interrupt-names: Should contain strings with the following names, each62 representing a specific interrupt,63 "vring" - interrupt for virtio based IPC64 "exception" - interrupt for exception notification65 66- kick-gpios: Should specify the gpio device needed for the virtio IPC67 stack. This will be used to interrupt the remote processor.68 The gpio device to be used is as per the bindings in,69 Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt70 71SoC-specific Required properties:72---------------------------------73The following are mandatory properties for Keystone 2 66AK2HK, 66AK2L and 66AK2E74SoCs only:75 76- clocks: Should contain the device's input clock, and should be77 defined as per the bindings in,78 Documentation/devicetree/bindings/clock/keystone-gate.txt79 80The following are mandatory properties for Keystone 2 66AK2G SoCs only:81 82- power-domains: Should contain a phandle to a PM domain provider node83 and an args specifier containing the DSP device id84 value. This property is as per the binding,85 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml86 87Optional properties:88--------------------89 90- memory-region: phandle to the reserved memory node to be associated91 with the remoteproc device. The reserved memory node92 can be a CMA memory node, and should be defined as93 per the bindings in94 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt95 96 97Examples:98---------99 1001.101 /* 66AK2H/K DSP aliases */102 aliases {103 rproc0 = &dsp0;104 rproc1 = &dsp1;105 rproc2 = &dsp2;106 rproc3 = &dsp3;107 rproc4 = &dsp4;108 rproc5 = &dsp5;109 rproc6 = &dsp6;110 rproc7 = &dsp7;111 };112 113 /* 66AK2H/K DSP memory node */114 reserved-memory {115 #address-cells = <2>;116 #size-cells = <2>;117 ranges;118 119 dsp_common_memory: dsp-common-memory@81f800000 {120 compatible = "shared-dma-pool";121 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;122 reusable;123 };124 };125 126 /* 66AK2H/K DSP node */127 soc {128 dsp0: dsp@10800000 {129 compatible = "ti,k2hk-dsp";130 reg = <0x10800000 0x00100000>,131 <0x10e00000 0x00008000>,132 <0x10f00000 0x00008000>;133 reg-names = "l2sram", "l1pram", "l1dram";134 clocks = <&clkgem0>;135 ti,syscon-dev = <&devctrl 0x40>;136 resets = <&pscrst 0>;137 interrupt-parent = <&kirq0>;138 interrupts = <0 8>;139 interrupt-names = "vring", "exception";140 kick-gpios = <&dspgpio0 27 0>;141 memory-region = <&dsp_common_memory>;142 };143 144 };145 1462.147 /* 66AK2G DSP alias */148 aliases {149 rproc0 = &dsp0;150 };151 152 /* 66AK2G DSP memory node */153 reserved-memory {154 #address-cells = <2>;155 #size-cells = <2>;156 ranges;157 158 dsp_common_memory: dsp-common-memory@81f800000 {159 compatible = "shared-dma-pool";160 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;161 reusable;162 };163 };164 165 /* 66AK2G DSP node */166 soc {167 dsp0: dsp@10800000 {168 compatible = "ti,k2g-dsp";169 reg = <0x10800000 0x00100000>,170 <0x10e00000 0x00008000>,171 <0x10f00000 0x00008000>;172 reg-names = "l2sram", "l1pram", "l1dram";173 power-domains = <&k2g_pds 0x0046>;174 ti,syscon-dev = <&devctrl 0x40>;175 resets = <&k2g_reset 0x0046 0x1>;176 interrupt-parent = <&kirq0>;177 interrupts = <0 8>;178 interrupt-names = "vring", "exception";179 kick-gpios = <&dspgpio0 27 0>;180 memory-region = <&dsp_common_memory>;181 };182 };183